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US4825281A Expired / Lapsed US ⏱️ 0.0 years remaining

Bipolar transistor with sidewall bare contact structure

Assignee: Hitachi Ltd
•
Filing: 1982-10-21
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Granted: 1989-04-25
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Expires: 2002-10-21
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Abstract

Abstract A semiconductor device wherein the active regions of a transistor are formed in an opening provided in an insulating film, electrodes are led out by a polycrystalline silicon film formed on the insulating film, and the upper surfaces of the emitter and base electrodes and the exposed surface of the insulating film are substantially even.

Inventors

  • 👤 Kazuo Nakazato
  • 👤 Tohru Nakamura
  • 👤 Masatoshi Matsuda
  • 👤 Takao Miyazaki
  • 👤 Tokuo Kure
  • 👤 Takahiro Okabe
  • 👤 Minoru Nagata

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-27 22:15
CPC Classifications
H; H10; H10D; H10D48/00; H10D48/30; H10D48/32; H10D48/34; H10D10/00; H10D10/01; H10D10/051; H10D10/40; H10D10/60; H10D48/345; H10D64/00; H10D64/20; H10D64/27; H10D64/281; H10P; H10P76/00; H10P76/40

Claims Analysis

Total Claims: 6
Claim 1
Independent Claim 247 words
A semiconductor device comprising a first insulating film which is formed on a surface region of a semiconductor substrate and which has a plurality of openings; an active transistor region having an emitter, a base and a collector, said active transistor region being formed in a semiconductor region protruding from said semiconductor substrate into one of said openings of said first insulating film; a polycrystalline silicon film which is formed on a desired area of said first insulating film in contact with a side part of said base; a first electrode which is connected to said semiconductor substrate in another of said openings of said first insulating film; a second insulating film which is deposited on said polycrystalline silicon film and on the first insulating film near to said polycrystalline silicon film and which has a plurality of openings; a second electrode which is connected to said polycrystalline silicon film in a desired one of said openings of said second insulating film; and a third electrode which is connected to an upper exposed area of said active transistor region in another of said openings of said second insulating film; a semiconductor layer of low resistance being interposed between said first electrode and said semiconductor substrate; a third insulating film being formed on an exposed surface of said first insulating film, wherein an SiO 2 film and an Si 3 N 4 film are stacked and deposited on a side part of said semiconductor layer of low resistance.
Claim 2
Dependent Claim 247 words
A semiconductor device comprising a first insulating film which is formed on a surface region of a semiconductor substrate and which has a plurality of openings; an active transistor region having an emitter, a base and a collector, said active transistor region being formed in a semiconductor region protruding from said semiconductor substrate into one of said openings of said first insulating film; a polycrystalline silicon film which is formed on a desired area of said first insulating film in contact with a side part of said base; a first electrode which is connected to said semiconductor substrate in another of said openings of said first insulating film; a second insulating film which is deposited on said polycrystalline silicon film and on the first insulating film near to said polycrystalline silicon film and which has a plurality of openings; a second electrode which is connected to said polycrystalline silicon film in a desired one of said openings of said second insulating film; and a third electrode which is connected to an upper exposed area of said active transistor region in another of said openings of said second insulating film; a semiconductor layer of low resistance being interposed between said first electrode and said semiconductor substrate; a third insulating film being formed on an exposed surface of said first insulating film, wherein an SiO 2 film and an Si 3 N 4 film are stacked and deposited on a side part of said semiconductor layer of low resistance.
Claim 3
Dependent Claim 27 words
A semiconductor device according to claim 1, wherein upper surfaces of said first electrode, said second electrode and said third electrode are substantially even with one another.
Claim 4
Dependent Claim 22 words
A semiconductor device according to claim 1 or 2, wherein said second and third insulating films are substantially even with one another.
Claim 5
Dependent Claim 30 words
A semiconductor device according to claim 1 or 2, wherein a polycrystalline silicon film is interposed between said upper exposed area of said active transistor region and said third electrode.
Claim 6
Dependent Claim 21 words
A semiconductor device according to claim 1 or 2, wherein a metal silicide film is deposited on said polycrystalline silicon film.

References Cited (Backward Citations)

US3796613A Cited
US4396933A Cited
US4276557A Cited
US4252581A Cited
US4303933A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1992-04-24 1992-10-24 1993-04-25 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1996-04-24 1996-10-24 1997-04-25 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2000-04-24 2000-10-24 2001-04-25 $7700.00 Window Closed / Lapsed

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