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US4792840A Expired / Lapsed US ⏱️ 0.0 years remaining

Resistor integrated on a semiconductor substrate

Assignee: Thales SA
•
Filing: 1987-04-01
•
Granted: 1988-12-20
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Expires: 2007-04-01
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Abstract

Abstract The invention provides a resistor integrated on a semiconductor substrate and capable of withstanding high voltages. The integrated resistor is formed by a well of the opposite conductivity type relative to that of the substrate and is in the form of a ribbon wound about one of its ends which is connected electrically to a conducting pole. The conducting pole provides the electric connection of the ribbon with the rear face of the substrate and through this substrate.

Inventors

  • 👤 Bruno Nadd

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-01 07:00
CPC Classifications
H; H10; H10D; H10D1/00; H10D1/40; H10D1/43; H10D84/00; H10D84/201; H10D84/204; H10D84/209

Claims Analysis

Total Claims: 5
Claim 1
Independent Claim 131 words
A resistor integrated on a semiconductor substrate of a first conductivity type having a first face and a second face and connected between a terminal on the first face and a metallization on the second face, the resistor comprising: a first region of a second conductivity type formed into the substrate from said first face, said first region including at least a spiral-shaped portion; a second highly doped region of the first conductivity type being formed at the center of the spiral-shaped portion of the first region and contacting the substrate, and a conductive stud formed on said first face connecting the second region with an inner portion of the spiral-shaped portion of the first region; wherein said terminal comprises an outer portion of the spiral-shaped portion of the first region.
Claim 2
Dependent Claim 131 words
A resistor integrated on a semiconductor substrate of a first conductivity type having a first face and a second face and connected between a terminal on the first face and a metallization on the second face, the resistor comprising: a first region of a second conductivity type formed into the substrate from said first face, said first region including at least a spiral-shaped portion; a second highly doped region of the first conductivity type being formed at the center of the spiral-shaped portion of the first region and contacting the substrate, and a conductive stud formed on said first face connecting the second region with an inner portion of the spiral-shaped portion of the first region; wherein said terminal comprises an outer portion of the spiral-shaped portion of the first region.
Claim 3
Dependent Claim 27 words
The resistor of claim 1, wherein the first region includes a further portion which extends from the outer portion of the spiralshaped portion around said spiral-shaped portion.
Claim 4
Dependent Claim 32 words
The resistor of claim 1, wherein said substrate comprises a highly doped wafer covered with an epitaxial layer of the same first conductivity type wherein are formed said first and second regions.
Claim 5
Dependent Claim 23 words
The resistor of claim 1, comprising at least one tap contacting an intermediate portion of said spiral shaped portion of the first region.

References Cited (Backward Citations)

US3138743A Cited
FR1539871A Cited
US3629667A Cited
US4157563A Cited
US4009483A Cited
US4139833A Cited
US4212025A Cited
US4181878A Cited
US4270137A Cited
US4423433A Cited
US4567502A Cited
US4691224A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1991-12-20 1992-06-20 1992-12-20 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1995-12-20 1996-06-20 1996-12-20 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1999-12-20 2000-06-20 2000-12-20 $7700.00 Window Closed / Lapsed

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