Semiconductor device having rapid removal of majority carriers from an active base region thereof at device turn-off and method of fabricating this device

Claim 2

A semiconductor device having the feature of rapid removal of majority carriers from an active base region thereof during turn-off of the device, comprising: (a) a semiconductor substrate comprising first and second regions; said first region being doped to one conductivity type and said second region being doped to the opposite conductivity type; at least a major portion of said first region adjacent said second region being doped to a first concentration; said first concentration being equal to at least 5×10 17 dopant atoms per cubic centimeter; said second region being doped to a second concentration which is at least as high as said first concentration; said substrate having a first surface comprising in part a surface of said second region and in further part a surface of said first region; said substrate having a second surface comprising a portion of said first region; (b) a first main electrode disposed on said second surface of said substrate, said first electrode (1) being ohmically connected to said first region, (2) not being ohmically connected to said second region and (3) being spaced from said second region; (c) a semiconductor layer disposed on said first surface of said substrate and comprising at least third and fourth regions; said third region comprising said active base region and separating said substrate from said layer fourth region; said third region being doped to said opposite conductivity type and said fourth region being doped to said one conductivity type; at least a major portion of said third region being doped to a third concentration substantially lower than said first concentration; a major portion of said fourth region being doped to a fourth concentration substantially higher than said third concentration; (d) second main electrode ohmically connected at least to a surface of said fourth region; and (e) a gate electrode contiguous with said fourth region, said gate electrode, when appropriate main bias is applied between said first and second main electrodes, being responsive to an appropriately applied gate bias to render said device conductive between said first and second main electrodes; (f) whereby when said device has been rendered conductive between said first and second main electrodes and said appropriate main bias is removed from said first and second main electrodes, opposite type conductivity carriers in said third region are rapidly transferred to said first region by being attracted toward and into said second region, causing said second region to effficiently inject opposite type conductivity carriers into said first region where said injected opposite type carriers combine with one type conductivity carriers in said first region to rapidly turn said device off.

Claim 3

The device according to claim 1 wherein the interface between said substrate first region and said semiconductor layer lies substantially in a single plane and the center of said substrate second region is situated between said plane and said second substrate surface.

Claim 4

The device according to claim 2 wherein said substrate second region has a doping concentration which is substantially higher than said first concentration.

Claim 5

The device according to claim 2 wherein a minor portion of said first region adjoining said second region has a fifth doping concentration substantially higher than said first concentration.

Claim 6

The device according to claim 4 wherein said first region minor portion additionally adjoins said layer.

Claim 7

The device according to claim 2 wherein a minor portion of said third region adjoining said substrate first surface and separating said third region major portion from said substrate is doped to a fifth concentration substantially higher than said third concentration but lower than said first concentration.

Claim 8

The semiconductor device of claim 2 wherein said gate electrode is an insulated-gate electrode in which the conductive portion of said insulated gate electrode is electrically insulated from said second electrode by an insulating portion of said insulated gate electrode which is contiguous with said second electrode; said insulated-gate electrode, only in response to an applied gate bias, inducing a channel through said fourth region beneath said insulated gate electrode, said channel conductively coupling opposite type carriers between said second electrode and said third region to render said semiconductor device conductive when said appropriate main bias is applied between said first and second main electrodes, and when said gate bias is removed repressing said channel through said fourth region to render said device nonconductive.

Claim 9

The device according to claim 7 further comprising: (a) a fifth region included in said layer; said fifth region adjoining said third and fourth regions, separated form said substrate by said third region, and having a free surface; a first junction between said third and fifth regions having a portion terminating at an exterior surface of said layer; and (b) said fifth region underlying said insulated gate electrode and comprising said channel in said fourth region, said insulated gate electrode convering an area on said layer including at least part of said fifth region free surface from a location proximate said terminated portion of said first junction and extending towards said second electrode.

Claim 10

The device according to claim 8 wherein said fifth region is doped to said one conductivity type.

Claim 11

The device according to claim 8 wherein said fifth region is doped to said opposite conductivity type.

Claim 12

The device accordingly claim 8 further comprising a sixth region doped to said opposite conductivity type, adjoining said fourth and fifth region, separated from said third region by said fourth and fifth regions, and having a sixth doping concentration substantially higher than said fourth concentration; a second junction between said fifth and sixth regions having a portion terminating at an exterior surface of said semiconductor layer; and wherein said area on said semiconductor layer covered by said gate electrode extends from said location proximate said terminated portion of said first junction to a location proximate said terminated portion of said second junction, whereby said sixth region is in said current path connecting together said third region and said second electrode.

Claim 13

The device according to claim 2 wherein: (a) said semiconductor layer further comprises a fifth region, said fifth region being doped to said opposite conductivity type, adjoining said fourth region, being separated from said third region by said fourth region, and having a fifth doping concentration substantially higher than said fourth concentration; and (b) said second electrode is further electrically connected to said layer fifth region.

Claim 14

The device according to claim 12 further including gate means to render the device conductive between said first and second electrodes.

Claim 15

The device according to claim 1 wherein said one conductivity type is P-type and second opposite conductivity type is N-type.

Claim 16

The device according to claim 1 wherein said first concentration is equal to at least 10 18 dopant atoms per cubic centimeter.

Claim 17

A semiconductor device exhibiting rapid removal of majority carriers from an active base region thereof during turn-off of the device, comprising: (a) a semiconductor substrate comprised of first and second adjacent regions, said first region being doped to one conductivity type and said second region being doped to the opposite conductivity type, at least a major portion of said first region adjacent said second region being doped to a first concentration of at least 5×10 17 dopant atoms per cubic centimeter, said second region being doped to a second concentration at least as high as said first concentration; (b) a semiconductor layer disposed on said substrate and forming a first interface therewith and comprising at least third and fourth regions; (c) said second region extending to said first interface and having a configuration whereby for selected cross sections through said device perpendicular to said first interface, segments of said first and second regions alternate along said first interface; (d) said layer third region comprising said active base region and separating said substrate from said layer fourth region, said third region being doped to said opposite conductivity type and said fourth region being doped to said one conductivity type, at least a major portion of said third region being doped to a third concentration substantially lower than said frist concentration, a major portion of said fourth region being doped to a fourth concentration substantially higher than said third concentration, said third and fourth regions having a second interface therebetween, said second interface being substantially in a single plane extending through said layer over an area which is sufficient to span at least two of said second region segments situated along a given one of said selected cross-sections; (e) a first main electrode ohmically connected to a surface of said first region of said substrate, not ohmically connected to said second region and spaced from said second region; (f) a second main electrode electrically connected to at least a surface of said fourth region; and (g) a gate electrode contiguous with said fourth region, said gate electrode, when an appropriate main bias is applied between said first and second main electrodes, being responsive to an appropriately applied gate bias to render said device conductive between said first and second main electrodes; (h) whereby when said device has been rendered conductive between said first and second main electrodes and said appropriate main bias is removed from said first and second main electrodes, opposite type conductivity carriers in said third region are rapidly transferred to said first region by being attracted toward and into said second region, causing said second region to efficiently inject opposite type conductivity carriers into said first region where said injected opposite type carriers combine with one type conductivity carriers in said first region to rapidly turn said device off.

Claim 18

A semiconductor device exhibiting rapid removal of majority carriers from an active base region thereof during turn-off of the device, comprising: (a) a semiconductor substrate comprised of first and second adjacent regions, said first region being doped to one conductivity type and said second region being doped to the opposite conductivity type, at least a major portion of said first region adjacent said second region being doped to a first concentration of at least 5×10 17 dopant atoms per cubic centimeter, said second region being doped to a second concentration at least as high as said first concentration; (b) a semiconductor layer disposed on said substrate and forming a first interface therewith and comprising at least third and fourth regions; (c) said second region extending to said first interface and having a configuration whereby for selected cross sections through said device perpendicular to said first interface, segments of said first and second regions alternate along said first interface; (d) said layer third region comprising said active base region and separating said substrate from said layer fourth region, said third region being doped to said opposite conductivity type and said fourth region being doped to said one conductivity type, at least a major portion of said third region being doped to a third concentration substantially lower than said frist concentration, a major portion of said fourth region being doped to a fourth concentration substantially higher than said third concentration, said third and fourth regions having a second interface therebetween, said second interface being substantially in a single plane extending through said layer over an area which is sufficient to span at least two of said second region segments situated along a given one of said selected cross-sections; (e) a first main electrode ohmically connected to a surface of said first region of said substrate, not ohmically connected to said second region and spaced from said second region; (f) a second main electrode electrically connected to at least a surface of said fourth region; and (g) a gate electrode contiguous with said fourth region, said gate electrode, when an appropriate main bias is applied between said first and second main electrodes, being responsive to an appropriately applied gate bias to render said device conductive between said first and second main electrodes; (h) whereby when said device has been rendered conductive between said first and second main electrodes and said appropriate main bias is removed from said first and second main electrodes, opposite type conductivity carriers in said third region are rapidly transferred to said first region by being attracted toward and into said second region, causing said second region to efficiently inject opposite type conductivity carriers into said first region where said injected opposite type carriers combine with one type conductivity carriers in said first region to rapidly turn said device off.

Claim 19

The semiconductor device according to claim 16 wherein said substrate second region has a doping concentration substantially higher than said first concentration.

Claim 20

The semiconductor device according to claim 16 wherein a minor portion of said first region adjoining said second region has a fifth doping concentration substantially higher than said first concentration.

Claim 21

The semiconductor device according to claim 18 wherein said first region minor portion additionally adjoins said semiconductor layer.

Claim 22

The semiconductor device according to claim 16 wherein a minor portion of said third region adjoining said substrate first surface and separating said third region major portion from said substrate is doped to a fifth concentration substantially higher than said third concentration but lower than said first concentration.

Claim 23

The semiconductor device of claim 16 wherein said gate electrode is an insulated-gate electrode in which the conductive portion of said insulated gate electrode is electrically insulated from said second electrode by an insulating portion of said insulated gate electrode which is continguous with said second electrode; said insulated-gate electrode, only in response to an applied gate bias, inducing a channel through said fourth region beneath said insulated gate electrode, said channel conductively coupling opposite type carriers between said second electrode and said third region to render said semiconductor device conductive when said appropriate main bias is applied between said first and second main electrodes and, when said gate bias is removed, repressing said channel through said fourth region to render said device nonconductive.

Claim 24

The semiconductor device according to claim 21 further comprising: (a) a fifth region included in said semiconductor layer; said fifth region adjoining said third and fourth regions, separate from said substrate by asid third region, and having a free surface; a first junction between said third and fifth regions having a portion terminating at a exterior surface of said layer; and (b) said fifth region underlying said insulated gate electrode and comprising said channel in said fourth region, said insulated gate electrode covering an area on said semiconductor layer including at least part of said fifth region free surface from a location proximate said terminated portion of said first junction and extending towards said second electrode.

Claim 25

The semiconductor device according to claim 22 wherein said fifth region is doped to said one conductivity type.

Claim 26

The semiconductor device according to claim 23 wherein said fifth region is doped to said opposite conductivity type.

Claim 27

The device according to claim 22 further comprising a sixth region doped to said opposite conductivity type, adjoining said fourth and fifth regions, separated from said third region by said fourth and fifth regions, and having a sixth doping concentration substantially higher than said fourth concentration; a second junction between said fourth and sixth regions having a portion terminating at an exterior surface of said semiconductor layer; and wherein said area on said semiconductor layer covered by said gate electrode extends from said location proximte said terminated portion of said first junction to a location proximate said terminated portion of said second junction, whereby said sixth region is in said current path connecting together said third region and said second electrode.

Claim 28

The semiconductor device according to claim 16 wherein (a) said semiconductor layer further comprises a fifth region, said fifth region being doped to said opposite conductivity type, adjoining said fourth region, being separated from said third region by said fourth region, and having a fifth doping concentration substantially higher than said fourth concentration; and (b) said second electrode is further electrically connected to said layer fifth region.

Claim 29

The device according to claim 16 wherein said first interface lies substantially in a single plane and the center of said substrate second region is situated between said plane and said second substrate surface.

Claim 30

The semiconductor device accoridng to claim 16 wherein said second region comprises a grid.

Claim 31

The semiconductor device according to claim 16 wherein said second region comprises a plurality of spaced apart segments.

Claim 32

The semiconductor device according to claim 29 wherein said second region comprises a plurality of spaced apart elongated segments.

Claim 33

The device according to claim 19 wherein a minor portion of said third region adjoining said substrate first surface and separating said third region major portion from said substrate is doped to a sixth concentration substantially higher than said third concentration, but lower than said first concentration.