Insulated gate static induction type thyristor

Claim 2

An insulated gate static induction type thyristor comprising: a high-resistivity semiconductor channel region of a substantially uniform low impurity concentration of a first conductivity type having opposed major surfaces; a cathode region means comprising a first high impurity concentration semiconductor region having said first conductivity type formed adjacent to one of said major surfaces of said channel region; a thin layer region having an impurity concentration higher than that of said channel region, a thickness much smaller than that of said channel region, said layer region having a first conductivity type and being formed on the other major surface of said channel region; substantially flat anode region means comprising a second highly doped semiconductor region having a second conductivity type opposite to that of said first conductivity type, the second semiconductor region being formed on that side of said thin layer region located opposite to the side adjacent to said channel region, the impurity concentration of said second semiconductor region being much higher than that of said thin layer region, and a second main electrode means comprising a conductive electrode formed in said second highly-doped semiconductor region and being generally coextensive therewith; at least two first semiconductor gate regions of said second conductivity type and having an impurity concentration lower than that of said cathode region means and being formed between said cathode region means and said channel region to substantially cover that bottom surface of said cathode region means facing said thin layer; another conductive electrode formed on a revealed part of said gate region on said one major surface of said channel region; and a thin insulating layer formed on said one major surface of said channel region, arranged between and insulating said two gate regions, and provided with a metal electrode to form a second MOS-gate electrode structure, said channel region having a portion sandwiched between said insulated gate region and said first semiconductor gate region in the vicinity of said one main surface of said high-resistivity channel region to serve as a part of current channel for those carriers supplied from said cathode region means and said anode region means.

Claim 3

An insulated gate static induction type thyristor comprising: a high-resistivity semicondutor channel region of a substantially uniform low impurity concentration of a first conductivity type having opposed major surfaces; a cathode region means comprising a first high impurity concentration semiconductor region having a said first conductivity type formed adjacent to one of said major surfaces of said channel region; a thin layer having an impurity concentration higher than that of said channel region, a thickness much smaller than that of said channel region, and being made with a semiconductor of said first conductivity type and formed on the other major surface of said channel region; a substantially flat anode region means comprising a second highly doped semiconductor region having a second conductivity type opposite to that of said first conductivity type, the second semiconductor region being formed on that side of said thin layer region located opposite to the side adjacent to said channel region, the impurity concentration of said second semiconductor region being much higher than that of said thin layer region, and a second main electrode means comprising a conductive electrode formed in said anode region means and generally coextensive therewith; at least two first semiconductor gate region having an impurity concentration lower than that of said cathode region and made with a semiconductor of said second conductivity type and formed between said cathode region and said channel region to substantially cover that bottom surface of said cathode region facing said thin layer; another conductive electrode formed on a revealed part of said gate region on said one major surface of said channel region, and a thin insulating layer formed on said one major surface of said channel region and being arranged in a position between and blocking said two gate regions thereby to form an insulated gate, and provided with a metal electrode to have a second MOS-gate electrode structure, said channel region having a portion sandwiched between said insulated gate and said first semiconductor gate region in the vicinity of said one main surface of said channel region to serve as a part of current channel for those carriers supplied from said cathode and said anode region, and said first semiconductor gate region being directly connected to said cathode region by a conductive electrode.

Claim 4

An insulated gate static induction type thyristor comprising: a high-resistivity semicondutor channel region of a substantially uniform low impurity concentration of a first conductivity type having opposed major surfaces; a cathode region means comprising a first high impurity concentration semiconductor region having a said first conductivity type formed adjacent to one of said major surfaces of said channel region; a thin layer having an impurity concentration higher than that of said channel region, a thickness much smaller than that of said channel region, and being made with a semiconductor of said first conductivity type and formed on the other major surface of said channel region; a substantially flat anode region means comprising a second highly doped semiconductor region having a second conductivity type opposite to that of said first conductivity type, the second semiconductor region being formed on that side of said thin layer region located opposite to the side adjacent to said channel region, the impurity concentration of said second semiconductor region being much higher than that of said thin layer region, and a second main electrode means comprising a conductive electrode formed in said anode region means and generally coextensive therewith; at least two first semiconductor gate region having an impurity concentration lower than that of said cathode region and made with a semiconductor of said second conductivity type and formed between said cathode region and said channel region to substantially cover that bottom surface of said cathode region facing said thin layer; another conductive electrode formed on a revealed part of said gate region on said one major surface of said channel region, and a thin insulating layer formed on said one major surface of said channel region and being arranged in a position between and blocking said two gate regions thereby to form an insulated gate, and provided with a metal electrode to have a second MOS-gate electrode structure, said channel region having a portion sandwiched between said insulated gate and said first semiconductor gate region in the vicinity of said one main surface of said channel region to serve as a part of current channel for those carriers supplied from said cathode and said anode region, and said first semiconductor gate region being directly connected to said cathode region by a conductive electrode.

Claim 5

An insulated gate static induction type thyristor according to claim 2 wherein: said thin insulating layer has an increased thickness in the central portion thereof.

Claim 6

An insulated gate static induction type thyristor according to claim 2, in which: said thin layer region has an impurity concentration at least one order of magnitude higher than that of said high-resistivity semiconductor region.

Claim 7

An insulated gate static induction type thyristor according to claim 2 or 3, in which: said thin layer region has an impurity concentration at least two orders of magnitude higher than that of said high-resistivity semiconductor region.

Claim 8

An insulated gate static induction type thyristor according to claim 2 or 3, in which: an impurity concentration of said high-resistivity semiconductor region is selected lower than 1×10 16 atoms/cm 3 .

Claim 9

An insulated gate static induction type thyristor according to claim 2 or 3, in which: an impurity concentration of said high-resistivity semiconductor region is selected in a range between 1×10 12 atoms/cm 3 and 1×10 15 atoms/cm 3 .

Claim 10

An insulated gate static induction type thyristor according to claim 2 or 3, in which: said thin layer region has an impurity concentration of at least one order of magnitude higher than that of said high-resistivity semicondutor region.

Claim 11

An insulated gate static induction type thyristor according to claim 2 or 3, in which: said impurity concentration of said thin layer region is at least one order of magnitude lower than that of said first semiconductor region.

Claim 12

An insulated gate static induction type thyristor according to claim 2 or 3, in which: said impurity concentration of said thin layer region is at least two orders of magnitude lower than that of said first semiconductor region.

Claim 13

An insulated gate static induction type thyristor according to claim 2 or 3, in which: said thin layer region has a thickness much smaller than that of said high-resistivity semiconductor region.

Claim 14

An insulated gate static induction type thyristor according to claim 2 or 3, in which: said third semiconductor region is directly connected to said first semiconductor region by a conductive electrode.

Claim 15

An insulated gate static induction type thyristor according to claim 2 or 3, in which: said high-resistivity semiconductor region contains a certain concentration of a substance having a killer effect for charge carriers.

Claim 16

An insulated gate static induction type thyristor according to claim 2 or 3, in which: said cathode means are provided two or more in number, and they are coupled together by a conductive electrode common to them.