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US4768076A Expired / Lapsed US ⏱️ 0.0 years remaining

Recrystallized CMOS with different crystal planes

Assignee: Hitachi Ltd
•
Filing: 1985-09-11
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Granted: 1988-08-30
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Expires: 2005-09-11
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Abstract

Abstract A CMOS IC is formed on a semiconductor crystalline surface having a plane azimuth (110) or (023), or of a plane azimuth close thereto (plane azimuth substantially in parallel with the above-mentioned planes), in order to increase the speed of operation. At low temperatures, dependency of the carrier mobility upon the plane azimuth becomes more conspicuous as shown in FIG. 1, and the difference of mobility is amplified depending upon the planes. Therefore, employment of the above-mentioned crystalline planes helps produce a great effect when the CMOS device is to be operated at low temperature (e.g., 100° K. or lower), and helps operate the device at high speeds.

Inventors

  • 👤 Masaaki Aoki
  • 👤 Toshiaki Masuhara
  • 👤 Terunori Warabisako
  • 👤 Shoji Hanamura
  • 👤 Yoshio Sakai
  • 👤 Seiichi Isomae
  • 👤 Satoshi Meguro
  • 👤 Shuji Ikeda

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-01 06:31
CPC Classifications
H; H10; H10D; H10D62/00; H10D62/40; H10D62/405; H10D84/00; H10D84/01; H10D84/02; H10D84/03; H10D84/038; H10D84/80; H10D84/82; H10D84/83; H10D84/8311; H10D84/85; H10D84/856; H10D88/00; H10D88/01; H10D84/8312

Claims Analysis

Total Claims: 14
Claim 1
Independent Claim 103 words
A semiconductor device comprising: a semiconductor substrate which has a first substantially flat surface lying substantially parallel to a (100) plane; an insulating film formed on said first substantially flat surface; a semiconductor layer, which is deposited on said insulating film and recrystallized by laser irradiation, and which has a second substantially flat surface lying substantially parallel to a (110) plane; and source and drain regions of a n-channel MOS transistor formed at said first substantially flat surface of said semiconductor substrate, and source and drain regions of a p-channel MOS transistor formed at said second substantially flat surface of said semiconductor layer.
Claim 2
Dependent Claim 103 words
A semiconductor device comprising: a semiconductor substrate which has a first substantially flat surface lying substantially parallel to a (100) plane; an insulating film formed on said first substantially flat surface; a semiconductor layer, which is deposited on said insulating film and recrystallized by laser irradiation, and which has a second substantially flat surface lying substantially parallel to a (110) plane; and source and drain regions of a n-channel MOS transistor formed at said first substantially flat surface of said semiconductor substrate, and source and drain regions of a p-channel MOS transistor formed at said second substantially flat surface of said semiconductor layer.
Claim 3
Dependent Claim 19 words
A semiconductor device according to claim 1, wherein said semiconductor substrate and said semiconductor layer are formed of silicon.
Claim 4
Dependent Claim 14 words
A semiconductor device according to claim 2, wherein said semiconductor substrate has p-type conductivity.
Claim 5
Dependent Claim 20 words
A semiconductor device according to claim 1, wherein said insulating film includes at least a Si 3 N 4 film.
Claim 6
Dependent Claim 28 words
A semiconductor device according to claim 1, wherein said p-channel MOS transistor and said n-channel MOS transistor are connected with each other so as to form an inverter.
Claim 7
Dependent Claim 24 words
A semiconductor device according to any one of claims 1-5, wherein said semiconductor device is adapted to operate at a temperature below 100° K.
Claim 8
Dependent Claim 99 words
A semiconductor device comprising: a semiconductor substrate which has a first substantially flat surface lying substantially parallel to a (100) plane; an insulating film formed on said substantially flat surface; a semiconductor layer, which is deposited on said insulating film and recrystallized, and which has a second substantially flat surface lying substantially parallel to a (110) plane; and source and drain regions of a n-channel MOS transistor formed at said first substantially flat surface of said semiconductor substrate, and source and drain regions of a p-channel MOS transistor formed at said second substantially flat surface of said semiconductor layer.
Claim 9
Dependent Claim 99 words
A semiconductor device comprising: a semiconductor substrate which has a first substantially flat surface lying substantially parallel to a (100) plane; an insulating film formed on said substantially flat surface; a semiconductor layer, which is deposited on said insulating film and recrystallized, and which has a second substantially flat surface lying substantially parallel to a (110) plane; and source and drain regions of a n-channel MOS transistor formed at said first substantially flat surface of said semiconductor substrate, and source and drain regions of a p-channel MOS transistor formed at said second substantially flat surface of said semiconductor layer.
Claim 10
Dependent Claim 19 words
A semiconductor device according to claim 7, wherein said semiconductor substrate and said semiconductor layer are formed of silicon.
Claim 11
Dependent Claim 14 words
A semiconductor device according to claim 8, wherein said semiconductor substrate has p-type conductivity.
Claim 12
Dependent Claim 19 words
A semiconductor device according to claim 8, wherein said insulating film includes at least Si 3 N 4 film.
Claim 13
Dependent Claim 28 words
A semiconductor device according to claim 8, wherein said p-channel MOS transistor and said n-channel MOS transistor are connected with each other so as to form an inverter.
Claim 14
Dependent Claim 23 words
A semiconductor device according to any one of claims 7-11, wherein said semiconductor device is adapted to operate at temperature below 100° K.

References Cited (Backward Citations)

US3476991A Cited
US3612960A Cited
US3603848A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1991-08-30 1992-02-29 1992-08-30 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1995-08-30 1996-02-29 1996-08-30 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1999-08-30 2000-02-29 2000-08-30 $7700.00 Window Closed / Lapsed

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