US4731746A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Electronic device for the acquisition of asynchronous periodic signals
Assignee: Bendix Electronics SA
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Filing: 1985-11-12
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Granted: 1988-03-15
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Expires: 2005-11-12
Abstract
Abstract The invention relates to a device for the acquisition and the processing of N asynchronous and periodic signals, such as velocity signals, N being preferably between 1 and 8, including a set of N synchronization flip-flops (B1) followed by a set of N storage flip-flops (B2) whose output is applied to a dedicated circuit via an N-input AND gate type assembly, the N synchronization flip-flops being sample by a flip-flop system (B4) from the clock of the dedicated circuit and the N automatic flip-flops (B1) being reset from said clock by an automatic flip-flop (B3).
Inventors
- 👤 Jean-Marc Nozeran
- 👤 Jean-Marc Villevielle
- 👤 Serge Nauleau
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 11:36
CPC Classifications
G; G06; G06F; G06F7/00; B; B60; B60T; B60T8/00; B60T8/17; B60T8/172; G01; G01P; G01P3/00; G01P3/42; G01P3/44; G01P3/48; G01P3/481; G01P3/489
Claims Analysis
Total Claims: 14
Claim 1
Independent Claim
123 words
Device for the acquisition and the processing of N asynchronous and periodic input signals, including a set of N synchronization flip-flops (B1) receiving said input signals and followed by a set of N storage flip-flops (B2) storing occurrences of said input signals coming from said synchronization flip-flops, said set of N storage flip-flops (B2) having an output connected to a single timer input of a microprocessor via an N-input AND gate means which is used for the combined acquisition by said microprocessor of all the occurrences of the input signals, the N synchronization flip-flops being clocked from an internal clock of the microprocessor by a flip-flop (B4) and wherein the N storage flip-flops are reset from said clock by an automatic flip-flop (B3).
Claim 2
Dependent Claim
123 words
Device for the acquisition and the processing of N asynchronous and periodic input signals, including a set of N synchronization flip-flops (B1) receiving said input signals and followed by a set of N storage flip-flops (B2) storing occurrences of said input signals coming from said synchronization flip-flops, said set of N storage flip-flops (B2) having an output connected to a single timer input of a microprocessor via an N-input AND gate means which is used for the combined acquisition by said microprocessor of all the occurrences of the input signals, the N synchronization flip-flops being clocked from an internal clock of the microprocessor by a flip-flop (B4) and wherein the N storage flip-flops are reset from said clock by an automatic flip-flop (B3).
Claim 3
Dependent Claim
15 words
Device according to claim 1 wherein the synchronization flip-flops are of the edge triggered D-type.
Claim 4
Dependent Claim
30 words
Device according to claim 2 wherein the said synchronization flip-flops (B1) are sampled by receiving the clock signals at the CLK input and the input signals at the D input.
Claim 5
Dependent Claim
56 words
Device according to claim 3, wherein the storage flip-flops (B2) receive at the CLK input the input signal coming from the output of the corresponding synchronization flip-flops, the Q output and D input of the storage flip-flops (B2) being connected while the Q output of the storage flip-flops (B2) is connected to said AND gate means.
Claim 6
Dependent Claim
21 words
Device according to claim 1, wherein the synchronization flip-flops are sampled at a frequency which is half that of the clock.
Claim 7
Dependent Claim
26 words
Device according to claim 1, wherein the automatic resetting of the storage flip-flops is triggered as soon as reading by the said dedicated circuit is complete.
Claim 8
Dependent Claim
25 words
Device according to claim 1 wherein the microprocessor is a type 6801, having an OS3 (OUTPUT STROBE) signal used to automatically reset said storage flip-flops.
Claim 9
Dependent Claim
24 words
Device according to claim 1 wherein one element computes in real time velocities corresponding to the input signals from data stored in said device.
Claim 10
Dependent Claim
18 words
Device according to claim 1 wherein the quantity of the said input signals range from 1 to 8.
Claim 11
Dependent Claim
12 words
Device according to claim 1 used in a vehicle anti-skid braking system.
Claim 12
Dependent Claim
13 words
Device according to claim 1 used in an assisted steering system for vehicle.
Claim 13
Dependent Claim
13 words
Device according to claim 1 used in a controlled suspension system for vehicle.
Claim 14
Dependent Claim
19 words
Device according to claim 1 used in a system avoiding the slip of the driving wheels of a vehicle.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1991-03-15 | 1991-09-14 | 1992-03-15 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1995-03-15 | 1995-09-14 | 1996-03-15 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1999-03-15 | 1999-09-14 | 2000-03-15 | $7700.00 | Window Closed / Lapsed |