US4721990A
Expired / Lapsed
US
⏱️ 0.0 years remaining
MOS type integrated circuit having charging and discharging transistors
Assignee: Toshiba Corp
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Filing: 1985-12-05
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Granted: 1988-01-26
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Expires: 2005-12-05
Abstract
Abstract A MOS integrated circuit includes one charging transistor and one discharging transistor. One end of the current path of the charging transistor is connected to one end of the current path of the discharging transistor. A high power voltage is applied to the other end of the current path of the charging transistor. The charging transistor charges the one end thereof to a predetermined voltage level. A low power voltage is applied to the other end of the current path of the discharging transistor. The discharging transistor discharges one end thereof to a predetermined voltage level. Each transistor includes layers of a low impurity concentration for weakening the surface electric field of the transistor, thereby reducing generation of hot electrons or impact ionization current. More hot electrons are generated in the charging transistor than in the discharging transistor. The weakening layers of the discharging transistor has, therefore, an impurity concentration higher than the weakening layers of the charging transistor.
Inventors
- 👤 Hiroyuki Kinoshita
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-06 05:10
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/60; H10D30/601; H10D30/603; H10D62/00; H10D62/60; H10D84/00; H10D84/80; H10D84/82; H10D84/83; H10D84/8311; H10D84/8312; H10D84/85
Claims Analysis
Total Claims: 18
Claim 1
Independent Claim
308 words
MOS type semiconductor integrated circuit comprising: at least one charging transistor including a semiconductor substrate of a first conductivity type, a first layer of a second conductivity type formed in said semiconductor substrate, said first layer serving as a drain, a second layer of the second conductivity type formed in said semiconductor substrate, said second layer serving as a source, and a third layer provided in at least a surface region of said semiconductor substrate and in contact with said first layer, said third layer being of the second conductivity type and having a lower impurity concentration than that of said first layer, said charging transistor receiving at one end of its current path a predetermined voltage for charging the other end of the current path substantially to the predetermined voltage, at least one discharging transistor including a semiconductor substrate substrate of the first conductivity type, a first layer of the second conductivity type formed in said semiconductor substrate, said first layer serving as a drain, a second layer of the second conductivity type formed in said semiconductor substrate, said second layer serving as a source, and a third layer provided in at least the surface region of said semiconductor substrate and in contact with said first layer, said third layer of said discharging transistor being of the second conductivity type and having an impurity concentration lower than that of said first layer of said discharging transistor, but higher than that of said third layer of said charging transistor, one end of the current path of said discharging transistor being coupled to the other end of the current path of said charging transistor, the other end of the current path of said discharging transistor being connected to a predetermined second voltage for discharging the end of the current path of said discharging transistor to said predetermined second voltage.
Claim 2
Dependent Claim
308 words
MOS type semiconductor integrated circuit comprising: at least one charging transistor including a semiconductor substrate of a first conductivity type, a first layer of a second conductivity type formed in said semiconductor substrate, said first layer serving as a drain, a second layer of the second conductivity type formed in said semiconductor substrate, said second layer serving as a source, and a third layer provided in at least a surface region of said semiconductor substrate and in contact with said first layer, said third layer being of the second conductivity type and having a lower impurity concentration than that of said first layer, said charging transistor receiving at one end of its current path a predetermined voltage for charging the other end of the current path substantially to the predetermined voltage, at least one discharging transistor including a semiconductor substrate substrate of the first conductivity type, a first layer of the second conductivity type formed in said semiconductor substrate, said first layer serving as a drain, a second layer of the second conductivity type formed in said semiconductor substrate, said second layer serving as a source, and a third layer provided in at least the surface region of said semiconductor substrate and in contact with said first layer, said third layer of said discharging transistor being of the second conductivity type and having an impurity concentration lower than that of said first layer of said discharging transistor, but higher than that of said third layer of said charging transistor, one end of the current path of said discharging transistor being coupled to the other end of the current path of said charging transistor, the other end of the current path of said discharging transistor being connected to a predetermined second voltage for discharging the end of the current path of said discharging transistor to said predetermined second voltage.
Claim 3
Dependent Claim
137 words
The semiconductor integrated circuit according to claim 1, in which said charging transistor includes a fourth layer, said fourth layer being formed in at least the surface region of said semiconductor substrate and in contact with said second layer of said charging transistor, said fourth layer being of the second conductivity type and having an impurity concentration substantially equal to that of said third layer of said charging transistor, and said discharging transistor includes a fourth layer, said fourth layer of said discharging transistor being formed in at least the surface region of said semiconductor substrate and in contact with said second layer of said discharging transistor, said fourth layer of said discharging transistor being of the second conductivity type and having an impurity concentration substantially equal to that of said third layer of said discharging transistor.
Claim 4
Dependent Claim
22 words
The semiconductor integrated circuit according to claim 1, in which said charging and discharging transistors are MOS transistors with an LDD structure.
Claim 5
Dependent Claim
22 words
The semiconductor integrated circuit according to claim 1, in which said charging and discharging transistors are MOS transistors with a GDD structure.
Claim 6
Dependent Claim
57 words
The semiconductor integrated circuit according to claim 12, in which the impurity concentration of said third layer of said charging transistor is from 10 16 /cm 3 to 10 18 /cm 3 , and the impurity concentration of said third layer of said discharging transistor is from 10 17 /cm 3 to 10 19 /cm 3 .
Claim 7
Dependent Claim
78 words
The semiconductor integrated circuit according to claim 1, in which said first and second semiconductor layers of said charging and discharging transistors have substantially equal impurity concentrations, the impurity concentration of said third layer of said discharging transistor is lower than those of said first and second layers of said charging and discharging transistors, and the impurity concentration of said third layer of said charging transistor is lower than that of said third layer of said discharging transistor.
Claim 8
Dependent Claim
247 words
A MOS type semiconductor integrated circuit comprising: at least one charging transistor including a semiconductor substrate of a first conductivity type, a first layer of a second conductivity type formed in said semiconductor substrate, said first serving as a drain, a second layer of the second conductivity type formed in said semiconductor substrate, said second layer serving as a source, and a third layer provided in at least a surface region of said semiconductor substrate and in contact with said first layer, said third layer being of the second conductivity type and having a lower impurity concentration than that of said first layer, and at least one discharging transistor including a semiconductor substrate of the first conductivity type, a first layer of the second conductivity type formed in said semiconductor substrate, said first layer serving as a drain, a second layer of the second conductivity type formed in said semiconductor substrate, said second layer serving as a source, and third layer provided in at least a surface region of said semiconductor substrate and in contact with said first layer of said discharging transistor, said third layer of said discharging transistor being of the second conductivity type and having an impurity concentration lower than that of said first layer of said discharging transistor, but higher than that of said third layer of said charging transistor, one end of the current path of said discharging transistor being coupled to one end of the current path of said charging transistor.
Claim 9
Dependent Claim
247 words
A MOS type semiconductor integrated circuit comprising: at least one charging transistor including a semiconductor substrate of a first conductivity type, a first layer of a second conductivity type formed in said semiconductor substrate, said first serving as a drain, a second layer of the second conductivity type formed in said semiconductor substrate, said second layer serving as a source, and a third layer provided in at least a surface region of said semiconductor substrate and in contact with said first layer, said third layer being of the second conductivity type and having a lower impurity concentration than that of said first layer, and at least one discharging transistor including a semiconductor substrate of the first conductivity type, a first layer of the second conductivity type formed in said semiconductor substrate, said first layer serving as a drain, a second layer of the second conductivity type formed in said semiconductor substrate, said second layer serving as a source, and third layer provided in at least a surface region of said semiconductor substrate and in contact with said first layer of said discharging transistor, said third layer of said discharging transistor being of the second conductivity type and having an impurity concentration lower than that of said first layer of said discharging transistor, but higher than that of said third layer of said charging transistor, one end of the current path of said discharging transistor being coupled to one end of the current path of said charging transistor.
Claim 10
Dependent Claim
129 words
The semiconductor integrated circuit according to claim 7, in which said charging transistor further comprises at least one fourth layer formed in at least the surface region of said semiconductor substrate and in contact with said second layer of said charging transistor, said fourth layer being of the second conductivity type and having a lower impurity concentration than that of said second layer of said charging transistor, and said discharging transistor further comprises at least one fourth layer formed in at least the surface region of said semiconductor substrate and in contact with said second layer of said discharging transistor, said fourth layer of the discharging transistor being of the second conductivity type and having a lower impurity concentration than that of said second layer of said discharging transistor.
Claim 11
Dependent Claim
36 words
The semiconductor integrated circuit according to claim 7, in which said charging transistor comprises a MOS transistor having an LDD (Lightly Doped Drain-Source) structure, and said discharging transistor comprises a MOS transistor having an LDD structure.
Claim 12
Dependent Claim
33 words
The semiconductor integrated circuit according to claim 8, in which said charging transistor comprises a MOS transistor having an LDD structure, and said discharging transistor comprises a MOS transistor having an LDD structure.
Claim 13
Dependent Claim
36 words
The semiconductor integrated circuit according to claim 7, in which said charging transistor comprises a MOS transistor having a GDD (Graded Diffused Drain-Source) structure, and said discharging transistor comprises a MOS transistor having a GDD structure.
Claim 14
Dependent Claim
83 words
The semiconductor integrated circuit according to claim 8, in which said charging transistor is a MOS transistor with a GDD structure having said third layer covering said first layer of said charging transistor and having said fourth layer covering said second layer of said charging transistor, and said discharging transistor is a MOS transistor with a GDD structure having said third layer covering said first layer of said discharging transistor and having said fourth layer covering said second layer of said discharging transistor.
Claim 15
Dependent Claim
57 words
The semiconductor integrated circuit according to claim 7, in which the impurity concentration of said third layer of said charging transistor is from 10 16 /cm 3 to 10 18 /cm 3 , and the impurity concentration of said third layer of said discharging transistor is from 10 17 /cm 3 to 10 19 /cm 3 .
Claim 16
Dependent Claim
111 words
The semiconductor integrated circuit according to claim 7, in which said charging transistor receives at the other end of its current path a first predetermined voltage, said charging transistor serving to charge said one end of the current path of said charging transistor to a second voltage equal to or lower than said first voltage, and said discharging transistor receives at the other end of its current path a third voltage lower than said second voltage, said discharging transistor serving to discharge said one end of the curent path of said second transistor to a fourth voltage equal to or higher than said third voltage but lower than said second voltage.
Claim 17
Dependent Claim
58 words
The semiconductor integrated circuit according to claim 7, in which said first and second layer of both of said charging and discharging transistors have substantially equal impurity concentrations, and the impurity concentration of said third layer of said discharging transistor is lower than that of said first and said said second layers of said charging and discharging transistors.
Claim 18
Dependent Claim
85 words
The semiconductor integrated circuit according to claim 8, in which said first and second layers of both of said charging and discharging transistors have substantially equal impurity concentrations, the impurity concentrations of said third and fourth layers of said discharing transistors are lower than that of said first and second layers of said charging and discharging transistors, and the impurity concentrations of said third and fourth layers of said charging transistors are lower than that of said third and fourth layer of said discharging transistor.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1991-01-25 | 1991-07-27 | 1992-01-26 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1995-01-25 | 1995-07-27 | 1996-01-26 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1999-01-25 | 1999-07-27 | 2000-01-26 | $7700.00 | Window Closed / Lapsed |