Process for producing by sloping etching a thin film transistor with a self-aligned gate with respect to the drain and source thereof

Claim 1

A process for producing a thin film transistor with a self-aligned gate with respect to its drain and source comprising the following successive steps: (a) producing the transistor gate on a glass substrate; (b) depositing an insulating layer on the substrate and the gate; (c) depositing a thick hydrogenated amorphous silicon layer on the insulating layer; (d) depsiting a positive photosensitive resin layer on the silicon layer; (e) irradiating the resin layer through the substrate, the gate serving as an irradiation mask; (f) developing the resin layer leading to the elimination of the irradiated zones of said resin layer; (g) etching the silicon layer until the insulating layer is exposed, the remaining resin serving as a mask for said etching; (h) producing electric contacts and source and drain electrodes of the transistor; and (i) eliminating the remaining resin and forming a plurality of staircase steps on the edges of the silicon layer by an equal number of successive and partial etching operations of said silicon layer, the remaining resin being used on each occasion as a mask and itself being etched isotropically over a limited thickness following each etching of the silicon layer.