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US4707455A Expired / Lapsed US ⏱️ 0.0 years remaining

Method of fabricating a twin tub CMOS device

Assignee: Intersil Corp
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Filing: 1986-11-26
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Granted: 1987-11-17
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Expires: 2006-11-26
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Abstract

Abstract A method of fabricating a semiconductor device having a symmetric and complementary P-well and N-well. The novel method involves the introduction of a first dopant type into a semiconductor substrate directly through those regions of an oxide layer and a nitride layer which do not underlie a first mask layer. The first mask layer is removed and a second mask layer is formed. A complementary dopant type is then introduced into the semiconductor substrate directly through those regions of the oxide layer and nitride layer which do not underlie the second mask layer. The second mask layer is removed and the dopant ions are simultaneously subjected to thermal drive in to thereby form adjacent wells of opposite dopant type in the semiconductor substrate.

Inventors

  • 👤 Joseph C. Tsang
  • 👤 Mario Ghezzo
  • 👤 Robert T. Fuller

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-25 16:39
CPC Classifications
H; H10; H10D; H10D84/00; H10D84/01; H10D84/0123; H10D84/0126; H10D84/0165; H10D84/0191; H10D84/02; H10D84/03; H10D84/038; H10P; H10P76/00; H10P76/40; H10D84/80; H10D84/82; H10D84/83; H10D84/85; H10D84/859

Claims Analysis

Total Claims: 10
Claim 1
Independent Claim 225 words
A method of fabricating a semiconductor device on a semiconductor substrate having a wafer layer thereon containing a dopant, said method comprising the steps of: forming an oxide layer on a major surface of said wafer layer; forming on the exposed surface of said oxide layer a layer of nitride material having a window exposing said oxide layer; forming a first mask layer at least over a first portion of said window; introducing a first type of dopant through the regions of said oxide layer and said nitride layer which do not underlie said first mask layer to thereby form a first region of predetermined depth in said wafer layer; removing said first mask layer; forming a second mask layer at least over a second portion of said window substantially adjacent to said first portion of said window; introducing a second type of dopant through the regions of said oxide layer and said nitride layer which do not underlie said second mask layer to thereby form a second region of predetermined depth in said wafer layer; removing said second mask layer; and exposing said wafer layer to a relatively elevated temperature to thereby simultaneously drive said first type of dopant and said second type of dopant deeper into said wafer layer; whereby substantially adjacent wells of opposite dopant type are obtained in said semiconductor substrate.
Claim 2
Independent Claim 225 words
A method of fabricating a semiconductor device on a semiconductor substrate having a wafer layer thereon containing a dopant, said method comprising the steps of: forming an oxide layer on a major surface of said wafer layer; forming on the exposed surface of said oxide layer a layer of nitride material having a window exposing said oxide layer; forming a first mask layer at least over a first portion of said window; introducing a first type of dopant through the regions of said oxide layer and said nitride layer which do not underlie said first mask layer to thereby form a first region of predetermined depth in said wafer layer; removing said first mask layer; forming a second mask layer at least over a second portion of said window substantially adjacent to said first portion of said window; introducing a second type of dopant through the regions of said oxide layer and said nitride layer which do not underlie said second mask layer to thereby form a second region of predetermined depth in said wafer layer; removing said second mask layer; and exposing said wafer layer to a relatively elevated temperature to thereby simultaneously drive said first type of dopant and said second type of dopant deeper into said wafer layer; whereby substantially adjacent wells of opposite dopant type are obtained in said semiconductor substrate.
Claim 3
Dependent Claim 19 words
A method as in claim 1 wherein said first mask layer and said second mask layer comprise photoresist material.
Claim 4
Dependent Claim 50 words
A method as in claim 1 further comprising the step of: forming a second oxide layer at least over said first and second portions of said window after exposing said wafer layer to said relatively elevated temperature, said second oxide layer having a thickness greater than said first oxide layer.
Claim 5
Dependent Claim 65 words
A method as in claim 3 further comprising the step of: forming a third mask layer at least over a portion of said second oxide layer; introducing a boron dopant through the region of said second oxide layer which does not underlie said third mask layer to thereby form a region of relatively high boron ion concentration in said substrate adjacent said second oxide layer.
Claim 6
Independent Claim 267 words
A method of fabricating a semiconductor device on a semiconductor substrate having a wafer layer thereon containing a dopant, said method comprising the steps of; forming a first oxide layer on a major surface of said wafer layer; forming on the exposed surface of said first oxide layer a layer of nitride material having a first window exposing said first oxide layer; forming a first mask layer at least over a first portion of said first window; introducing a first type of dopant through the regions of said oxide layer and said nitride layer which do not underlie said first mask layer to thereby form a first region of predetermined depth in said wafer layer; removing said first mask layer; forming a second mask layer at least over a second portion of said first window substantially adjacent to said first portion of said first window; introducing a second type of dopant through the regions of said oxide layer and said nitride layer which do not underlie said second mask layer to thereby form a second region of predetermined depth in said wafer layer; removing said second mask layer and at least a portion of said first oxide layer to open a second window, said second window extending between the walls of said first window to expose a portion of said major surface therebetween; and exposing said wafer layer to a relatively elevated temperature to thereby simultaneously drive said first type of dopant and said second type of dopant deeper into said wafer layer; whereby substantially adjacent wells of opposite dopant type are obtained in said semiconductor substrate.
Claim 7
Independent Claim 267 words
A method of fabricating a semiconductor device on a semiconductor substrate having a wafer layer thereon containing a dopant, said method comprising the steps of; forming a first oxide layer on a major surface of said wafer layer; forming on the exposed surface of said first oxide layer a layer of nitride material having a first window exposing said first oxide layer; forming a first mask layer at least over a first portion of said first window; introducing a first type of dopant through the regions of said oxide layer and said nitride layer which do not underlie said first mask layer to thereby form a first region of predetermined depth in said wafer layer; removing said first mask layer; forming a second mask layer at least over a second portion of said first window substantially adjacent to said first portion of said first window; introducing a second type of dopant through the regions of said oxide layer and said nitride layer which do not underlie said second mask layer to thereby form a second region of predetermined depth in said wafer layer; removing said second mask layer and at least a portion of said first oxide layer to open a second window, said second window extending between the walls of said first window to expose a portion of said major surface therebetween; and exposing said wafer layer to a relatively elevated temperature to thereby simultaneously drive said first type of dopant and said second type of dopant deeper into said wafer layer; whereby substantially adjacent wells of opposite dopant type are obtained in said semiconductor substrate.
Claim 8
Dependent Claim 19 words
A method as in claim 5 wherein said first mask layer and said second mask layer comprise photoresist material.
Claim 9
Dependent Claim 50 words
A method as in claim 5 further comprising the step of: forming a second oxide layer at least over said first and second portions of said window after exposing said wafer layer to said relatively elevated temperature, said second oxide layer having a thickness greater than said first oxide layer.
Claim 10
Dependent Claim 65 words
A method as in claim 5 further comprising the step of: forming a third mask layer at least over a portion of said second oxide layer; introducing a boron dopant through the region of said second oxide layer which does not underlie said third mask layer to thereby form a region of relatively high boron ion concentration in said substrate adjacent said second oxide layer.

References Cited (Backward Citations)

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USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1990-11-16 1991-05-18 1991-11-17 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1994-11-16 1995-05-18 1995-11-17 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1998-11-16 1999-05-18 1999-11-17 $7700.00 Window Closed / Lapsed

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