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US4689656A Expired / Lapsed US ⏱️ 0.0 years remaining

Method for forming a void free isolation pattern and resulting structure

Assignee: International Business Machines Corp
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Filing: 1986-05-23
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Granted: 1987-08-25
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Expires: 2006-05-23
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Abstract

Abstract The void-free pattern of isolation in a semiconductor substrate is described. There is contained within a semiconductor body a pattern of substantially vertically sided trenches. The pattern of isolation trenches isolate regions of monocrystalline semiconductor material which may contain active and passive semiconductor devices. The depth of the pattern of trenches is greater than about 3 micrometers. A first insulating layer is located upon the sidewalls of the trenches. The base or bottom of the trenches is open to the monocrystalline semiconductor body. An epitaxial layer extending from the base of the trenches fills the pattern of trenches up to between about 500 to 1500 nanometers from the upper surface of the trenches. A capping second insulating layer fills the additional portion of the pattern of trenches above the upper surfaces of the epitaxial layer for isolation of the pattern of trenches from the ambient. It is the dense epitaxial monocrystalline semiconductor which prevents the formation of voids within the pattern of trenches. The epitaxial layer must be grown in such a way so as no spurious growth occurs upon the principal surfaces of the substrate, because such growth would prevent the satisfactory chemical-mechanical polishing of the C.V.D. insulator layer.

Inventors

  • 👤 Victor J. Silvestri
  • 👤 D. Duan-Lee Tang

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-28 20:35
CPC Classifications
H; H10; H10P; H10P14/00; H10P14/20; H10P14/24; H10P14/27; H10P14/271; H10P14/29; H10P14/2901; H10P14/2902; H10P14/2905; H10P14/34; H10P14/3402; H10P14/3404; H10P14/3411; H10W; H10W10/00; H10W10/01; H10W10/041; H10W10/40; H10W20/00; H10W20/01; H10W20/021

Claims Analysis

Total Claims: 7
Claim 1
Independent Claim 105 words
A void free isolated semiconductor structure comprising: a pattern of trenches within a semiconductor body each trench having substantially vertical sidewalls extending from a bottom portion of said trenches; a first insulating layer upon said vertical sidewalls of said trenches; no portion of said first insulating layer being on the bottom portion of said trenches; an epitaxial monocrystalline semiconductor layer extending from said bottom portion of said trenches and filling said trenches up to between about 0.5 to 1.5 micrometers from the upper surface of said trenches; and a second insulating layer on said semiconductor layer which isolates said pattern of trenches from adjoining structures.
Claim 2
Dependent Claim 105 words
A void free isolated semiconductor structure comprising: a pattern of trenches within a semiconductor body each trench having substantially vertical sidewalls extending from a bottom portion of said trenches; a first insulating layer upon said vertical sidewalls of said trenches; no portion of said first insulating layer being on the bottom portion of said trenches; an epitaxial monocrystalline semiconductor layer extending from said bottom portion of said trenches and filling said trenches up to between about 0.5 to 1.5 micrometers from the upper surface of said trenches; and a second insulating layer on said semiconductor layer which isolates said pattern of trenches from adjoining structures.
Claim 3
Dependent Claim 14 words
The semiconductor structure of claim 1 wherein the said semiconductor body is monocrystalline silicon.
Claim 4
Dependent Claim 23 words
The semiconductor structure of claim 1 wherein said first insulating layer is composed of a silicon dioxide layer and a silicon nitride layer.
Claim 5
Dependent Claim 19 words
The semiconductor structure of claim 1 wherein the depth of said trenches is between about 3 to 10 micrometers.
Claim 6
Dependent Claim 19 words
The semiconductor structure of claim 4 wherein the width of said trenches is between about 1 to 300 micrometers.
Claim 7
Dependent Claim 20 words
The semiconductor structure of claim 1 wherein said second insulating layer is composed of a chemically vapor deposited silicon dioxide.

References Cited (Backward Citations)

US4104086A Cited
JPS54128298A Cited
US4256514A Cited
US4255207A Cited
US4454647A Cited
US4454646A Cited
JPS58159348A Cited
US4473598A Cited
US4503451A Cited
US4509249A Cited
US4528047A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1990-08-24 1991-02-23 1991-08-25 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1994-08-24 1995-02-23 1995-08-25 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1998-08-24 1999-02-23 1999-08-25 $7700.00 Window Closed / Lapsed

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