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US4678542A Expired / Lapsed US ⏱️ 0.0 years remaining

Self-alignment process for thin film diode array fabrication

Assignee: Nippon Steel Corp
•
Filing: 1986-07-25
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Granted: 1987-07-07
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Expires: 2006-07-25
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Abstract

Abstract A self-alignment process for the fabrication of an array formed from a plurality of micron-scale solid state circuit elements operatively disposed upon a large area substrate. By the instant process electrical contact may be established with the upper electrode of the micron-scale solid state circuit elements without the necessity of masking.

Inventors

  • 👤 Willem D. Boer
  • 👤 Atsushi Kawasaki

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-04 21:43
CPC Classifications
H; H10; H10D; H10D86/00; H10D86/01; H10D86/021; H10D86/0231; H10D64/00; H10D64/01; H10D64/011; H10D86/40; H10D86/60; H10P; H10P76/00; H10P76/20; H10P76/204; H10P76/2041; Y; Y10; Y10S; Y10S438/00; Y10S438/942; Y10S438/948

Claims Analysis

Total Claims: 25
Claim 1
Independent Claim 191 words
In a process for the fabrication of an array which includes a plurality of micron-scale solid state circuit elements operatively disposed in a preselected pattern on the first surface of a large area substrate, said elements including a body of thin film semiconductor alloy material sandwiched between substantially aligned electrodes, the improved method including the steps of: providing a substrate capable of transmitting a level of radiation sufficient to activate a superposed radiation sensitive film; forming the elements such that the opacity thereof prevents the transmission of a level of radiation capable of activating a superposed radiation sensitive film; depositing a thin insulating film over the elements and interstitial first surface of the substrate; depositing a radiation sensitive film over the thin insulating film; irradiating the surface of the large area substrate opposite the first surface; developing and processing the activated radiation sensitive film so as to expose a portion of the insulating film overlying the elements; and etching the exposed insulating film so as to expose a portion of the electrode overlying the elements, whereby an electrical contact to said overlying electrode may be established without the necessity of masking.
Claim 2
Dependent Claim 191 words
In a process for the fabrication of an array which includes a plurality of micron-scale solid state circuit elements operatively disposed in a preselected pattern on the first surface of a large area substrate, said elements including a body of thin film semiconductor alloy material sandwiched between substantially aligned electrodes, the improved method including the steps of: providing a substrate capable of transmitting a level of radiation sufficient to activate a superposed radiation sensitive film; forming the elements such that the opacity thereof prevents the transmission of a level of radiation capable of activating a superposed radiation sensitive film; depositing a thin insulating film over the elements and interstitial first surface of the substrate; depositing a radiation sensitive film over the thin insulating film; irradiating the surface of the large area substrate opposite the first surface; developing and processing the activated radiation sensitive film so as to expose a portion of the insulating film overlying the elements; and etching the exposed insulating film so as to expose a portion of the electrode overlying the elements, whereby an electrical contact to said overlying electrode may be established without the necessity of masking.
Claim 3
Dependent Claim 20 words
A process as in claim 1 including the further step of forming the solid state circuit elements as p-i-n diodes.
Claim 4
Dependent Claim 20 words
A process as is claim 1 including the further step of forming the solid state circuit elements as Schottky diodes.
Claim 5
Dependent Claim 21 words
A process as in claim 1 including the further step of forming the solid state circuit elements as two terminal devices.
Claim 6
Dependent Claim 34 words
A process as in claim 1 including the further step of forming the solid state circuit elements as three-terminal devices in which an intermediate electrode is provided in the body of semiconductor alloy material.
Claim 7
Dependent Claim 29 words
A process as in claim 1 including the further step of forming the semiconductor alloy material of the solid state circuit elements from a host matrix of amorphous silicon.
Claim 8
Dependent Claim 20 words
A process as in claim 6 including the further step of incorporating germanium in the host matrix of amorphous silicon.
Claim 9
Dependent Claim 29 words
A process as in claim 1 including the further step of forming the semiconductor alloy material of the solid state circuit elements from a host matrix of amorphous germanium.
Claim 10
Dependent Claim 20 words
A process as in claim 8 including the further step of incorporating silicon in the host matrix if amorphous germanium.
Claim 11
Dependent Claim 24 words
A process as in claim 1 including the further step of forming the solid state circuit elements from a host matrix of chalcogenide material.
Claim 12
Dependent Claim 25 words
A process as in claim 10 including the further step of forming the solid state circuit elements from tellurium, selenium or a tellurium, selenium alloy.
Claim 13
Dependent Claim 18 words
A process as in claim 1 including the further step of forming the electrodes from a metallic material.
Claim 14
Dependent Claim 28 words
A process as in claim 1 including the further step of forming at least one of the electrodes from an oxide of tin, zinc, indium or indium tin.
Claim 15
Dependent Claim 22 words
A process as in claim 1 including the further step of forming the substrate from transparent glass or a synthetic plastic resin.
Claim 16
Dependent Claim 20 words
A process as in claim 1 including the further step of utilizing a positive photoresist as the radiation sensitive film.
Claim 17
Dependent Claim 36 words
A process as in claim 15 wherein the step of developing and processing the radiation sensitive film includes the further steps of depositing a metallic overlayer and removing the overlayer and the subjacent radiation sensitive film.
Claim 18
Dependent Claim 21 words
A process as in claim 1 including the further step of utilizing a negative photoresist film as the radiation sensitive film.
Claim 19
Dependent Claim 26 words
A process as in claim 1 including the further step of irradiating the surface of the large area substrate opposite the first surface with actinic light.
Claim 20
Dependent Claim 22 words
A process as in claim 1 including the further step of electrically contacting the upper electrode of each solid state circuit element.
Claim 21
Dependent Claim 22 words
A process as in claim 1 including the further step of forming the insulating film from an oxide or nitride of silicon.
Claim 22
Dependent Claim 30 words
A process as in claim 1 including the further step of forming each of the solid state circuit elements so as to have a maximum dimension of under 100 microns.
Claim 23
Dependent Claim 29 words
A process as in claim 21 including the further step of forming each of the solid state circuit elements so as to have a maximum dimension of 20-30 microns.
Claim 24
Dependent Claim 28 words
A process as in claim 22 including the further step of exposing only a central portion of the upper electrode of each of the solid state circuit elements.
Claim 25
Dependent Claim 30 words
A process as in claim 23 including the further step of exposing an 8-15 micron central portion of the upper electrode of the solid state circuit elements for electrical contact.

References Cited (Backward Citations)

US3442647A Cited
EP0071244A2 Cited
US4381341A Cited
US4587720A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1990-07-06 1991-01-05 1991-07-07 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1994-07-06 1995-01-05 1995-07-07 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1998-07-06 1999-01-05 1999-07-07 $7700.00 Window Closed / Lapsed

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