Method of making implanted device regions in a semiconductor using a master mask member

Claim 1

A method of manufacturing a semiconductor device utilizing a single master mask comprising steps of: forming a first film (61), on a semiconductor substrate (41) having a first conductivity type; forming a second film (62) on a central portion of the first film (61); using a master mask (65) to form a first resist pattern (66), having a central portion located on the central portion of the second film (62) and overlying the area reserved for a gate region, and a peripheral portion located on said first film (61) and spaced from said second film (62), leaving exposed the area of the first film (61) located therebetween; masking the substrate with said first resist pattern and said second film for ion-implanting impurities into the substrate in a region adjacent to the periphery of said second film, to form a first ion-implantation layer having a first conductivity type; moving said first resist pattern (66); using said second film to mask said central portion of said first film to form a field insulating film about the periphery of said second film to cover said first ion-implantation layer; removing said second film and said first film (61) underlying said second film (62), using said master mask to form a second resist pattern (70), identical to said first resist pattern, said second resist pattern having a peripheral portion located on said field insulating film (68) and a central portion, overlying the area reserved for the gate region, located on the substrate (41) and spaced from the inner edge of the field insulating film (68); masking the substrate with said second resist pattern and said field insulating film for ion-implanting impurities in a region adjacent said first ion-implantation layer having said first conductivity type; removing said second resist pattern (70); forming a third film (72) and a gate electrode (73) overlying and in contact with said third film on a region of substrate (41) surrounded by said field insulating film (68); and using said gate electrode to mask an area central of said second ion-implantation layer for ion-implanting impurities into substrate (41), to form a third ion-implantation layer comprised of source region (74) and a drain region (75) having a second conductivity type.

Claim 2

A method of manufacturing a semiconductor device utilizing a single master mask comprising steps of: forming a first film (61), on a semiconductor substrate (41) having a first conductivity type; forming a second film (62) on a central portion of the first film (61); using a master mask (65) to form a first resist pattern (66), having a central portion located on the central portion of the second film (62) and overlying the area reserved for a gate region, and a peripheral portion located on said first film (61) and spaced from said second film (62), leaving exposed the area of the first film (61) located therebetween; masking the substrate with said first resist pattern and said second film for ion-implanting impurities into the substrate in a region adjacent to the periphery of said second film, to form a first ion-implantation layer having a first conductivity type; moving said first resist pattern (66); using said second film to mask said central portion of said first film to form a field insulating film about the periphery of said second film to cover said first ion-implantation layer; removing said second film and said first film (61) underlying said second film (62), using said master mask to form a second resist pattern (70), identical to said first resist pattern, said second resist pattern having a peripheral portion located on said field insulating film (68) and a central portion, overlying the area reserved for the gate region, located on the substrate (41) and spaced from the inner edge of the field insulating film (68); masking the substrate with said second resist pattern and said field insulating film for ion-implanting impurities in a region adjacent said first ion-implantation layer having said first conductivity type; removing said second resist pattern (70); forming a third film (72) and a gate electrode (73) overlying and in contact with said third film on a region of substrate (41) surrounded by said field insulating film (68); and using said gate electrode to mask an area central of said second ion-implantation layer for ion-implanting impurities into substrate (41), to form a third ion-implantation layer comprised of source region (74) and a drain region (75) having a second conductivity type.

Claim 7

A method of manufacturing a semiconductor device utilizing a single master mask, comprising the steps of: forming a first film (42) on a surface of a semiconductor substrate (41) having a first conductivity type; forming a second film (43) and a gate electrode (44) overlying and in contact with said second film on a central portion of said first film; masking said substrate with said master mask to form a first resist pattern (48) on said first film (42), said pattern having a peripheral portion surrounding said central portion of said first film; using said first resist pattern (48) and said gate electrode (44) and said second film (43) as a mask for ion-implanting impurities in the element region surrounding said gate electrode (44) and said second film (43) to form a first ion-implantation layer (49 and 50) having said first conductivity type; removing said first resist pattern (48); forming a third film (51) on substrate (41) immediately adjacent to the periphery of said gate electrode (44); masking said substrate with said master mask (47) to form a second resist pattern (52), identical to said first resist pattern, on first film: (42); using said second resist pattern as a mask for ion-implanting impurities in the element region surrounding said third film (51) to form source and drain regions (53 and 54), having a second conductivity type, adjacent said first ion-implantation layer.

Claim 8

A method of manufacturing a semiconductor device utilizing a single master mask, comprising the steps of: forming a first film (42) on a surface of a semiconductor substrate (41) having a first conductivity type; forming a second film (43) and a gate electrode (44) overlying and in contact with said second film on a central portion of said first film; masking said substrate with said master mask to form a first resist pattern (48) on said first film (42), said pattern having a peripheral portion surrounding said central portion of said first film; using said first resist pattern (48) and said gate electrode (44) and said second film (43) as a mask for ion-implanting impurities in the element region surrounding said gate electrode (44) and said second film (43) to form a first ion-implantation layer (49 and 50) having said first conductivity type; removing said first resist pattern (48); forming a third film (51) on substrate (41) immediately adjacent to the periphery of said gate electrode (44); masking said substrate with said master mask (47) to form a second resist pattern (52), identical to said first resist pattern, on first film: (42); using said second resist pattern as a mask for ion-implanting impurities in the element region surrounding said third film (51) to form source and drain regions (53 and 54), having a second conductivity type, adjacent said first ion-implantation layer.