US4546534A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Semiconductor device manufacture
Assignee: US Philips Corp
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Filing: 1983-01-27
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Granted: 1985-10-15
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Expires: 2003-01-27
Abstract
Abstract A first masking layer on a semiconductor body is defined by exposing a layer of negative acting radiation sensitive resist to a radiation pattern through a mask. Doped regions are then formed at unmasked surface areas of the body. A layer of positive acting resist is provided on an insulating layer at the surface of the body, and a second masking layer is defined in this layer by exposure to the pattern radiation beam through the same mask. An insulating layer pattern which is accurately aligned above the doping region is then formed by etching the exposed parts of the layer. Alternatively, the same type of resist is used at both exposure stages. By adjusting the resist processing, the second masking layer is made larger than the first masking layer. In this case, the second masking layer is used to define an oxygen mask before oxidizing the exposed surface of the body to form an accurately aligned oxide layer pattern.
Inventors
- 👤 Keith H. Nicholas
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-03 00:01
CPC Classifications
H; H10; H10P; H10P30/00; H10P30/20; H10P30/202; H10P30/204; H10D; H10D62/00; H10D62/10; H10D62/102; H10D62/112; H10P30/21; H10P30/212; H10P30/22; H10P76/00; H10P76/20; H10P76/204; H10P76/2041; H10P95/00; Y; Y10; Y10S; Y10S438/00; Y10S438/975; Y10S438/978
Claims Analysis
Total Claims: 32
Claim 1
Independent Claim
149 words
A method of manufacturing a semiconductor device having an insulating layer pattern on a doped surface region of a semiconductor body, said method comprising the steps of providing a first radiation sensitive resist layer on at least one insulating layer on a major surface of a semiconductor body, exposing said first resist layer to a patterned radiation beam through a mask to define a first masking layer in said first resist layer, forming a doped region in said semiconductor body at surface areas free of said first masking layer, removing said first masking layer, providing a second radiation sensitive resist layer on said insulating layer, exposing said second resist layer to another patterned radiation beam through said same mask to define a second masking layer in said second resist layer, and removing parts of said insulating layer free of said second masking layer to provide an insulating layer pattern.
Claim 2
Independent Claim
149 words
A method of manufacturing a semiconductor device having an insulating layer pattern on a doped surface region of a semiconductor body, said method comprising the steps of providing a first radiation sensitive resist layer on at least one insulating layer on a major surface of a semiconductor body, exposing said first resist layer to a patterned radiation beam through a mask to define a first masking layer in said first resist layer, forming a doped region in said semiconductor body at surface areas free of said first masking layer, removing said first masking layer, providing a second radiation sensitive resist layer on said insulating layer, exposing said second resist layer to another patterned radiation beam through said same mask to define a second masking layer in said second resist layer, and removing parts of said insulating layer free of said second masking layer to provide an insulating layer pattern.
Claim 3
Dependent Claim
44 words
A method according to claim 1, wherein one of said first or second resist layers is positive acting and the other of said second or first resist layers is negative acting, and wherein remaining portions of said insulating layer form said insulating layer pattern.
Claim 4
Dependent Claim
51 words
A method according to claim 2, wherein one of said two masking layers is defined partly by an area of the corresponding resist layer exposed directly to the relevant patterned radiation beam and partly by surrounding areas of said corresponding resist layer exposed to scattered radiation from said patterned radiation beam.
Claim 5
Dependent Claim
13 words
A method according to claim 3, where said insulating layer is an oxide.
Claim 6
Dependent Claim
13 words
A method according to claim 2, where said insulating layer is an oxide.
Claim 7
Dependent Claim
51 words
A method according to claim 1, where one of said two masking layers is defined partly by an area of the corresponding resist layer exposed directly to the relevant patterned radiation beam and partly by surrounding areas of said corresponding resist layer exposed to scattered radiation from said patterned radiation beam.
Claim 8
Dependent Claim
64 words
A method according to claim 6, where said first and second resist layers are both negative acting or both positive acting, and wherein said insulating layer pattern is formed by oxidizing areas of said semiconductor body free of said insulating layer, said oxide layer pattern being inset into said semiconductor body at least over a part of the thickness of said oxide layer pattern.
Claim 9
Dependent Claim
13 words
A method according to claim 7, where said insulating layer is silicon nitride.
Claim 10
Independent Claim
33 words
A method according to one of claims 1, 2, 3, 4, 5, 6, 7 or 8, wherein said parts of said insulating layer free of said second masking layer are removed by etching.
Claim 11
Independent Claim
25 words
A method according to one of claims 1, 2, 3, 4, 5, 6, 7 or 8, wherein said doped region is formed by ion implantation.
Claim 12
Dependent Claim
19 words
A method according to claim 10, wherein said ions are implanted into said semiconductor body through said insulating layer.
Claim 13
Independent Claim
27 words
A method according to one of claims 1, 2, 3, 4, 5, 6, 7 or 8, wherein a field effect transistor is formed in said semiconductor body.
Claim 14
Dependent Claim
46 words
A method according to claim 12, wherein said insulating layer pattern is an oxide forming a thick field oxide around said field effect transistor, and wherein said doped region forms a parasitic channel stopper to prevent inversion layers forming below areas of said thick field oxide.
Claim 15
Dependent Claim
27 words
A method according to claim 12, wherein said first and second resist layers are sensitive to electron radiation, and said patterned radiation beam is an electron beam.
Claim 16
Independent Claim
37 words
A method according to one of claims 1, 2, 3, 4, 5, 6, 7 and 8, wherein said first and second resist layers are sensitive to electron radiation, and said patterned radiation beam is an electron beam.
Claim 17
Independent Claim
154 words
A method of manufacturing a semiconductor device having an insulating layer pattern on a doped surface region of a semiconductor body, said method comprising the steps of providing a first radiation sensitive resist layer on at least one insulating layer on a major surface of a semiconductor body, exposing said first resist layer to a patterned radiation beam through a mask to define a first masking layer in said first resist layer, removing parts of said insulating layer free of said first masking layer to provide an insulating layer pattern, removing said first masking layer, providing a second radiation sensitive resist layer on said semiconductor body and said insulating layer pattern, exposing said second resist layer to another patterned radiation beam through said same mask to define a second masking layer in said second resist layer, and forming a doped region in said semiconductor body at surface areas free of said second masking layer.
Claim 18
Independent Claim
154 words
A method of manufacturing a semiconductor device having an insulating layer pattern on a doped surface region of a semiconductor body, said method comprising the steps of providing a first radiation sensitive resist layer on at least one insulating layer on a major surface of a semiconductor body, exposing said first resist layer to a patterned radiation beam through a mask to define a first masking layer in said first resist layer, removing parts of said insulating layer free of said first masking layer to provide an insulating layer pattern, removing said first masking layer, providing a second radiation sensitive resist layer on said semiconductor body and said insulating layer pattern, exposing said second resist layer to another patterned radiation beam through said same mask to define a second masking layer in said second resist layer, and forming a doped region in said semiconductor body at surface areas free of said second masking layer.
Claim 19
Dependent Claim
44 words
A method according to claim 16, wherein one of said first or second resist layers is positive acting and the other of said second or first resist layers is negative acting, and wherein remaining portions of said insulating layer form said insulating layer pattern.
Claim 20
Dependent Claim
51 words
A method according to claim 17, wherein one of said two masking layers is defined partly by an area of the corresponding resist layer exposed directly to the relevant patterned radiation beam and partly by surrounding areas of said corresponding resist layer exposed to scattered radiation from said patterned radiation beam.
Claim 21
Dependent Claim
13 words
A method according to claim 18, where said insulating layer is an oxide.
Claim 22
Dependent Claim
13 words
A method according to claim 17, where said insulating layer is an oxide.
Claim 23
Dependent Claim
51 words
A method according to claim 16, where one of said two masking layers is defined partly by an area of the corresponding resist layer exposed directly to the relevant patterned radiation beam and partly by surrounding areas of said corresponding resist layer exposed to scattered radiation from said patterned radiation beam.
Claim 24
Dependent Claim
64 words
A method according to claim 21, where said first and second resist layers are both negative acting or both positive acting, and wherein said insulating layer pattern is formed by oxidizing areas of said semiconductor body free of said insulating layer, said oxide layer pattern being inset into said semiconductor body at least over a part of the thickness of said oxide layer pattern.
Claim 25
Dependent Claim
13 words
A method according to claim 22, where said insulating layer is silicon nitride.
Claim 26
Independent Claim
33 words
A method according to one of claims 16, 17, 18, 19, 20, 21, 22 or 23, wherein said parts of said insulating layer free of said first masking layer are removed by etching.
Claim 27
Independent Claim
25 words
A method according to one of claims 16, 17, 18, 19, 20, 21, 22 or 23, wherein said doped region is formed by ion implantation.
Claim 28
Dependent Claim
19 words
A method according to claim 25, wherein said ions are implanted into said semiconductor body through said insulating layer.
Claim 29
Independent Claim
28 words
A method according to one of the claims 16, 17, 18, 19, 20, 21, 22, or 23, wherein a field effect transistor is formed in said semiconductor body.
Claim 30
Dependent Claim
46 words
A method according to claim 27, wherein said insulating layer pattern is an oxide forming a thick field oxide around said field effect transistor, and wherein said doped region forms a parasitic channel stopper to prevent inversion layers forming below areas of said thick field oxide.
Claim 31
Dependent Claim
27 words
A method according to claim 27, wherein said first and second resist layers are sensitive to electron radiation, and said patterned radiation beam is an electron beam.
Claim 32
Independent Claim
37 words
A method according to one of claims 16, 17, 18, 19, 20, 21, 22 or 23, wherein said first and second resist layers are sensitive to electron radiation, and said patterned radiation beam is an electron beam.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1988-10-14 | 1989-04-15 | 1989-10-15 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1992-10-14 | 1993-04-15 | 1993-10-15 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1996-10-14 | 1997-04-15 | 1997-10-15 | $7700.00 | Window Closed / Lapsed |