US4674173A
Expired / Lapsed
US
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Method for fabricating bipolar transistor
Assignee: Texas Instruments Inc
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Filing: 1985-06-28
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Granted: 1987-06-23
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Expires: 2005-06-28
Abstract
Abstract One embodiment of the present invention provides a method whereby a symmetrical transistor may be fabricated which eliminates the problems of scalability caused by the requirement of fabricating an extrinsic base. The method accomplishes this by the use of a polysilicon extrinsic base structure which is formed in a trench containing an insulating layer in the bottom of the trench formed by differential oxidation. After fabricating appropriate isolation structures, two trenches for either side of the intrinsic base are cut into the surface of the substrate. The bottom of these trenches are then heavily doped. A silicon dioxide layer is then thermally grown in the trenches. Because the bottoms of the trenches are heavily doped, a thicker silicon dioxide layer is formed in the bottom of the trenches. This silicon dioxide layer is then etched so that the silicon dioxide layer is completely removed from the sides of the trench but remains in the bottoms of the trench. The trenches are then filled with polycrystalline silicon. After the fabrication of the intrinsic base, the emitter and the contact to a subcollector, dopant ions are implanted into the polycrystalline silicon extrinsic base thereby heavily doping the extrinsic base. This implantation is driven in which causes a P+ region to be formed on the edges of the intrinsic base thus providing good contact between polycrystalline silicon extrinsic base and the intrinsic base. Because this implantation is performed as one of the last steps in fabricating the transistor, the undesirable effects of out diffusion of the extrinsic base are eliminated.
Inventors
- 👤 Larry A. Hahn
- 👤 Robert H. Havemann
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 01:40
CPC Classifications
H; H10; H10D; H10D10/00; H10D10/40; H10D10/421; H10D10/01; H10D10/051; H10D62/00; H10D62/10; H10D62/113; H10D62/17; H10D62/177; H10D64/00; H10D64/01; H10D64/011; H10D64/0111; H10D64/0113; H10D64/20; H10D64/27; H10D64/281; H10P; H10P14/00; H10P14/60; H10P14/63; H10P14/6302; H10P14/6304; H10P14/6306; H10P14/6308; H10P14/6309; H10P14/6322; H10P14/65; H10P14/6502; H10P32/00; H10P32/10; H10P32/14; H10P32/1408; H10P32/1414; H10P32/17; H10P32/171; H10W; H10W20/00; H10W20/01; H10W20/021
Claims Analysis
Total Claims: 22
Claim 1
Independent Claim
102 words
A process for fabricating a bipolar transistor, comprising the steps of: providing a substrate having a first region of a first conductivity type serving as a collector; etching a depression into said first region; forming an insulating layer in the bottom of said depression; filling said depression with an electrically conductive material; forming a second region having a second conductivity type in said first region adjacent to said depression, said second region serving as a base; forming a third region of said first conductivity type serving as an emitter in said second region; and then implanting dopant ion into said conductive material.
Claim 2
Dependent Claim
102 words
A process for fabricating a bipolar transistor, comprising the steps of: providing a substrate having a first region of a first conductivity type serving as a collector; etching a depression into said first region; forming an insulating layer in the bottom of said depression; filling said depression with an electrically conductive material; forming a second region having a second conductivity type in said first region adjacent to said depression, said second region serving as a base; forming a third region of said first conductivity type serving as an emitter in said second region; and then implanting dopant ion into said conductive material.
Claim 3
Dependent Claim
17 words
A process as in claim 1 further including the step of annealing said implanted of dopant ions.
Claim 4
Dependent Claim
13 words
A process as in claim 1 wherein said conductive material is polycrystalline silicon.
Claim 5
Dependent Claim
89 words
A process as in claim 1 wherein said step of forming insulating material in the bottom of said depression is accomplished by the steps of: implanting dopant ions into the bottom of said depression; forming a layer of silicon dioxide on the surface of said depression by thermal oxidation; and etching said layer of silicon dioxide to completely remove the portions of said silicon dioxide layer on the sides of said depression but not completely remove the portion of said silicon dioxide layer in the bottom of said depression.
Claim 6
Dependent Claim
13 words
A process as in claim 1 wherein said dopant ion is boron difluoride.
Claim 7
Dependent Claim
13 words
A process as in claim 2 wherein said conductive material is polycrystalline silicon.
Claim 8
Dependent Claim
92 words
A process as in claim 2 wherein said step of forming insulating material in the bottom of said first and second trenches is accomplished by the steps of: implanting dopant ions into the bottom of said depression; forming a layer of silicon dioxide on the surface of said depression by thermal oxidation; and etching said layer of silicon dioxide to completely remove the portions of said silicon dioxide layer on the sides of said depression but not completely remove the portion of said silicon dioxide layer in the bottom of said depression.
Claim 9
Dependent Claim
92 words
A process as in claim 3 wherein said step of forming insulating material in the bottom of said first and second trenches is accomplished by the steps of: implanting dopant ions into the bottom of said depression; forming a layer of silicon dioxide on the surface of said depression by thermal oxidation; and etching said layer of silicon dioxide to completely remove the portions of said silicon dioxide layer on the sides of said depression but not completely remove the portion of said silicon dioxide layer in the bottom of said depression.
Claim 10
Dependent Claim
92 words
A process as in claim 6 wherein said step of forming insulating material in the bottom of said first and second trenches is accomplished by the steps of: implanting dopant ions into the bottom of said depression; forming a layer of silicon dioxide on the surface of said depression by thermal oxidation; and etching said layer of silicon dioxide to completely remove the portions of said silicon dioxide layer on the sides of said depression but not completely remove the portion of said silicon dioxide layer in the bottom of said depression.
Claim 11
Dependent Claim
13 words
A process as in claim 9 wherein said dopant ion is boron difluoride.
Claim 12
Dependent Claim
101 words
A process for fabricating a bipolar transistor, comprising the steps of: providing a substrate having a first region of a first conductivity type serving as a collector; etching a depression into said first region; forming an insulating layer in the bottom of said depression; filling said depression with a semiconductive material; forming a second region having a second conductivity type in said first region adjacent to said depression, said second region serving as a base; forming a third region of said first conductivity type serving as an emitter in said second region; and then implanting dopant ions into said semiconductive material.
Claim 13
Dependent Claim
101 words
A process for fabricating a bipolar transistor, comprising the steps of: providing a substrate having a first region of a first conductivity type serving as a collector; etching a depression into said first region; forming an insulating layer in the bottom of said depression; filling said depression with a semiconductive material; forming a second region having a second conductivity type in said first region adjacent to said depression, said second region serving as a base; forming a third region of said first conductivity type serving as an emitter in said second region; and then implanting dopant ions into said semiconductive material.
Claim 14
Dependent Claim
17 words
A process as in claim 11 further including the step of annealing said implanted of dopant ions.
Claim 15
Dependent Claim
13 words
A process as in claim 11 wherein said semiconductive material is crystalline silicon.
Claim 16
Dependent Claim
91 words
A process as in claim 11 wherein said step of forming insulating material in the bottom of said first and second trenches is accomplished by the steps of: implanting dopant ions into the bottom of said depression; forming a layer of silicon dioxide on the surface of said depression by thermal oxidation; and etching said layer of silicon dioxide to completely remove the portions of said silicon dioxide layer on the sides of depression but not completely remove the portion of said silicon dioxide layer in the bottom of said depression.
Claim 17
Dependent Claim
97 words
A process for forming a bipolar transistor, comprising the steps of: providing a crystalline semiconductor substrate having a first region of a first conductivity type serving as a collector; etching first and second trenches into said first region; forming insulating material in the bottom of said first and second trenches; filling said first and second trenches with a conductive material; forming a second region of a second conductivity type between said first and second trenches; forming a third region of said first conductivity type in said second region; and then implanting dopant ions into said conductive material.
Claim 18
Dependent Claim
97 words
A process for forming a bipolar transistor, comprising the steps of: providing a crystalline semiconductor substrate having a first region of a first conductivity type serving as a collector; etching first and second trenches into said first region; forming insulating material in the bottom of said first and second trenches; filling said first and second trenches with a conductive material; forming a second region of a second conductivity type between said first and second trenches; forming a third region of said first conductivity type in said second region; and then implanting dopant ions into said conductive material.
Claim 19
Dependent Claim
92 words
A process as in claim 15 wherein said step of forming insulating material in the bottom of said first and second trenches is accomplished by the steps of: implanting dopant ions into the bottom of said trenches; forming a layer of silicon dioxide on the surface of said trenches by thermal oxidation; and etching said layer of silicon dioxide to completely remove the portions of said silicon dioxide layer on the sides of said trenches but not completely remove the portion of said silicon dioxide layer in the bottom of said trenches.
Claim 20
Dependent Claim
144 words
A process for forming a bipolar transistor, comprising the steps of: forming a trench surronding an active area in a substrate, said substrate serving as a collector; forming an insulating layer in the bottom of said trench; forming a conductive region in said trench; forming an insulating cap on the surface of said conductive material in said trench; implanting dopant ions into said active region to form an instrinsic base; implanting dopant ions into said active region to form an emitter; forming a layer of conductive material on the surface of said substrate above said active region; etching through said insulating to said conductive region using said layer of conductive material as an etching mask; and implanting dopant ions into said conductive region and annealing said substrate to cause said dopant ions to partially diffuse into said active region to form an extrinsic base.
Claim 21
Dependent Claim
144 words
A process for forming a bipolar transistor, comprising the steps of: forming a trench surronding an active area in a substrate, said substrate serving as a collector; forming an insulating layer in the bottom of said trench; forming a conductive region in said trench; forming an insulating cap on the surface of said conductive material in said trench; implanting dopant ions into said active region to form an instrinsic base; implanting dopant ions into said active region to form an emitter; forming a layer of conductive material on the surface of said substrate above said active region; etching through said insulating to said conductive region using said layer of conductive material as an etching mask; and implanting dopant ions into said conductive region and annealing said substrate to cause said dopant ions to partially diffuse into said active region to form an extrinsic base.
Claim 22
Dependent Claim
24 words
A process as in claim 17 further comprising the step of: forming sidewall oxide layers on the sides of said layer of conductive material.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1990-06-22 | 1990-12-22 | 1991-06-23 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1994-06-22 | 1994-12-22 | 1995-06-23 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1998-06-22 | 1998-12-22 | 1999-06-23 | $7700.00 | Window Closed / Lapsed |