Uses for buried contacts in integrated circuits

Claim 2

In a monolithic integrated circuit having insulated gate field effect transistors (IGFETs) and a polycrystalline silicon buried contact on at least one region of one of the IGFETs, the improvement wherein the integrated circuit also includes an additional device area having a polycrystalline silicon buried contact thereon that forms part of an additional type of electrical device other than an IGFET, the additional device area that is divided by said polycrystalline silicon buried contact into at least two discrete parts, at least one region in each discrete part that contains the same dopant in the same dopant concentration profile through the thickness of the region as is contained in source and drain regions in one of said IGFETs, and discrete electrical contacts of the same material layer on all of said regions for electrically biasing said regions, whereby the regions in said additional device area and their separating buried contact cooperate to form a type of electrical component in the integrated circuit that is in addition to and different from said IGFETs.

Claim 3

In an integrated circuit having complementary insulated gate field effect transistors (IGFETs), at least one of which is disposed in an island area of one conductivity type semiconductive material surrounded by opposite conductivity type semiconductive material, and a polycrystalline silicon buried contact on at least one region of the IGFET in the island area, the improvement wherein the integrated circuit also includes at least one additional island area of the one conductivity type, the additional island area has the same predominant dopant in the same predominant dopant concentration profile as in the first-mentioned island area, a bipolar lateral transistor is disposed in the additional island area, and the bipolar lateral transistor comprises a polycrystalline silicon buried contact on the additional island area that divides the additional island area adjacent the buried contact into two parts and concurrently provides a low electrical resistance contact to the additional island area beneath the polycrystalline silicon buried contact, an opposite conductivity type region in each of the two parts having a predominant dopant and a predominant doping concentration profile through its thickness that is the same as source-drain doping for the other of said complementary IGFETs in the integrated circuit, and discrete electrical contacts to said regions in the additional island area by which the latter regions can be respectively forwardly and reversely biased with respect to a bias applied to the additional island area by the buried contact, effective to form a bipolar lateral transistor in the integrated circuit in addition to the complementary IGFETs.

Claim 4

In an integrated circuit having complementary insulated gate field effect transistors (IGFETs), at least one of which is disposed in an island area of one conductivity type semiconductive material surrounded by opposite conductivity type semiconductive material, and a polycrystalline silicon buried contact on at least one region of the IGFET in the island area, the improvement wherein the integrated circuit also includes at least one additional island area of the one conductivity type, the additional island area has the same predominant dopant in the same predominant dopant concentration profile as in the first-mentioned island area, a bipolar lateral transistor is disposed in the additional island area, and the bipolar lateral transistor comprises a polycrystalline silicon buried contact on the additional island area that divides the additional island area adjacent the buried contact into two parts and concurrently provides a low electrical resistance contact to the additional island area beneath the polycrystalline silicon buried contact, an opposite conductivity type region in each of the two parts having a predominant dopant and a predominant doping concentration profile through its thickness that is the same as source-drain doping for the other of said complementary IGFETs in the integrated circuit, and discrete electrical contacts to said regions in the additional island area by which the latter regions can be respectively forwardly and reversely biased with respect to a bias applied to the additional island area by the buried contact, effective to form a bipolar lateral transistor in the integrated circuit in addition to the complementary IGFETs.

Claim 5

In a monolithic integrated circuit having PMOS and NMOS complementary insulated gate field effect transistors (IGFETs), some of which are disposed in N-type wells, and polycrystalline silicon buried contacts to at least one of the source and drain regions of some of the IGFETs in the N-type wells, the improvement wherein the integrated circuit also includes at least one additional N-type well, the N-type well is identical in predominant conductivity-determining impurity and distribution through the thickness of the N-type well as in the first-mentioned N-type well, a polycrystalline silicon buried contact bisects a surface of the additional N-type well of the integrated circuit into two adjacent parts and provides an N-plus doping completely across a central portion of the N-type well surface and a low resistance electrical connection therewith, a P-type region is disposed in each part of the bisected N-type well surface, source-drain doping in some of the PMOS IGFETs in other N-type wells is identical in predominant conductivity-determining impurity and distribution through the source-drain thickness to that of the P-type regions in the two adjacent parts of the additional N-type well, and discrete electrical contacts for said P-type regions by which those regions can be respectively forwardly and reversely biased with respect to an electrical bias applied to the buried contact, effective to form a bipolar lateral PNP transistor in the additional N-type well in addition to PMOS IGFETs formed in other N-type wells and to buried contacts formed in still other portions of the integrated circuits.

Claim 6

In a monolithic integrated circuit having PMOS and NMOS complementary insulated gate field effect transistors (IGFETs), some of which are disposed in N-type wells, and polycrystalline silicon buried contacts to at least one of the source and drain regions of some of the IGFETs in the N-type wells, the improvement wherein the integrated circuit also includes at least one additional N-type well, the N-type well is identical in predominant conductivity-determining impurity and distribution through the thickness of the N-type well as in the first-mentioned N-type well, a polycrystalline silicon buried contact bisects a surface of the additional N-type well of the integrated circuit into two adjacent parts and provides an N-plus doping completely across a central portion of the N-type well surface and a low resistance electrical connection therewith, a P-type region is disposed in each part of the bisected N-type well surface, source-drain doping in some of the PMOS IGFETs in other N-type wells is identical in predominant conductivity-determining impurity and distribution through the source-drain thickness to that of the P-type regions in the two adjacent parts of the additional N-type well, and discrete electrical contacts for said P-type regions by which those regions can be respectively forwardly and reversely biased with respect to an electrical bias applied to the buried contact, effective to form a bipolar lateral PNP transistor in the additional N-type well in addition to PMOS IGFETs formed in other N-type wells and to buried contacts formed in still other portions of the integrated circuits.

Claim 7

The monolithic integrated circuit defined in claim 1 wherein the integrated circuit further contains first and second complementary IGFETs, the first-mentioned polycrystalline silicon buried contact is on the first IGFET, and the regions in the discrete parts of the additional device area have a predominant doping that is the same in impurity and impurity concentration profile through their thickness as is contained in the source and drain regions of the the second IGFET, whereby those regions and the buried contact on that additional area comprise a bipolar lateral transistor.