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US4662059A
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US
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Method of making stabilized silicon-on-insulator field-effect transistors having 100 oriented side and top surfaces
Assignee: Intersil Corp
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Filing: 1985-09-19
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Granted: 1987-05-05
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Expires: 2005-09-19
Abstract
Abstract A MOS/SOI field-effect transistor is made by applying a layer of a photoresist over the surface of a single-crystalline silicon layer which is on a substrate of an insulating material, such as sapphire. The surface of the silicon layer is along a (100) crystallographic plane. The photoresist layer is defined to provide an area of the photoresist layer over the area of the silicon layer where the transistor is to be formed with the edges of the photoresist area being along the edges of (100) crystallographic planes which are perpendicular to the surface of the silicon layer. The portion of the silicon layer around the photoresist layer is etched with an anisotropic plasma etch which etches the silicon layer along the (100) crystallographic planes which are perpendicular to the surface of the silicon layer to form an island of the silicon. The etching is achieved by a two step process in which the first step etches part way through the silicon layer and the second step etches completely through with an overetch. This forms the silicon island with sides which extend along (100) crystallographic planes substantially perpendicular to the top surface and which are smooth, undamaged and have rounded edges with the top surface. After removing the photoresist, a MOS field-effect transistor is formed on the island.
Inventors
- 👤 Ronald K. Smeltzer
- 👤 Wesley H. Morris
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 22:36
CPC Classifications
H; H10; H10D; H10D86/00; H10D86/01; H10D86/03; H10D30/00; H10D30/60; H10D30/67; H10D30/674; H10D30/6741; H10D30/6743; H10D30/6744; H10D30/6758; H10D30/6759; H10D62/00; H10D62/40; H10D62/405; H10P; H10P50/00; H10P50/20; H10P50/24; H10P50/242; Y; Y10; Y10S; Y10S148/00; Y10S148/115
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
171 words
In a method of making a silicon-on-insulator MOS field-effect transistor, the steps of (a) providing a photoresist layer over the surface of a layer of single-crystalline silicon which is on an insulating substrate, which surface extends along a (100) crystallographic plane, (b) defining said photoresist layer to provide at least one area which has its edges extending along the edges of (100) crystallographic planes of the silicon layer which are perpendicular to the surface of the silicon layer with portions of the silicon surface being exposed around the edges of said photoresist area, and (c) etching the exposed portion of the silicon layer by an anisotropic plasma etch which etches along the (100) crystallographic planes of the silicon layer which are perpendicular to the surface of the silicon layer to form an island of silicon, the sides of which extend along (100) crystallographic planes substantially perpendicular to the top surface of the island and which are substantially smooth and undamaged and have rounded edges between the sides and the top surface.
Claim 2
Dependent Claim
171 words
In a method of making a silicon-on-insulator MOS field-effect transistor, the steps of (a) providing a photoresist layer over the surface of a layer of single-crystalline silicon which is on an insulating substrate, which surface extends along a (100) crystallographic plane, (b) defining said photoresist layer to provide at least one area which has its edges extending along the edges of (100) crystallographic planes of the silicon layer which are perpendicular to the surface of the silicon layer with portions of the silicon surface being exposed around the edges of said photoresist area, and (c) etching the exposed portion of the silicon layer by an anisotropic plasma etch which etches along the (100) crystallographic planes of the silicon layer which are perpendicular to the surface of the silicon layer to form an island of silicon, the sides of which extend along (100) crystallographic planes substantially perpendicular to the top surface of the island and which are substantially smooth and undamaged and have rounded edges between the sides and the top surface.
Claim 3
Dependent Claim
72 words
A method in accordance with claim 1 wherein the silicon layer is anistropically etched in a plasma first in an atmosphere of nitrogen, chlorine and boron trichloride for a time period to etch at least part way through the silicon layer and secondly in an atmosphere of only chlorine for a time period to etch completely through the silicon layer and for an additional time to overetch the sides of the islands.
Claim 4
Dependent Claim
72 words
A method in accordance with claim 2 wherein the first etch step is carried out at a pressure of 10 mtorr±2 mtorr, an RF voltage between the plates of the plasma reactor of 1200 watts±100 watts, and a flow of 35 cc to 65 cc per minute of the nitrogen, 8 cc to 15 cc per minute of the chlorine and 15 cc to 25 cc per minute of the boron trichloride.
Claim 5
Dependent Claim
49 words
A method in accordance with claim 3 wherein the second etch step is carried out at a pressure of 15 mtorr±5 mtorr, an RF voltage between the plates of the plasma reactor of 600 to 1000 watts and a flow of 35 cc±10 cc per minute of the chlorine.
Claim 6
Dependent Claim
29 words
A method in accordance with claim 4 including the step of purging the atmosphere in which the etch steps are carried out with nitrogen between the two etch steps.
Claim 7
Dependent Claim
53 words
A method in accordance with claim 5 where in the first step a flow of 50 cc per minute of nitrogen, 10 cc per minute of chlorine and 20 cc per minute of boron chloride is used and in the second step a flow of 35 cc per minute of chlorine is used.
Claim 8
Dependent Claim
103 words
A method in accordance with claim 1 wherein the insulating substrate has a flat along one edge which is parallel to the (110) crystallographic planes in the silicon layer which are perpendicular to the surface of the silicon layer, and the photoresist layer is defined by placing a mask having an opaque area corresponding in shape and size to the silicon island to be formed over the photoresist layer, with a side of the opaque area parallel to the flat on the insulating substrate, rotating the mask with respect to the silicon layer through 45°, and then exposing and developing the photoresist layer.
Claim 9
Dependent Claim
91 words
A method in accordance with claim 1 wherein the insulating substrate has a flat along one edge which is parallel to the (100) crystallographic planes in the silicon layer which are perpendicular to the surface of the silicon layer, and the photoresist layer is defined by placing a mask having an opaque area corresponding in shape and size to the silicon island to be formed over the photoresist layer with an edge of the opaque area parallel to the flat on the insulating substrate and exposing and developing the photoresist layer.
Claim 10
Dependent Claim
93 words
A method in accordance with claim 1 wherein after etching the silicon layer to form the island performing the additional steps of (d) removing the photoresist from the top surface of the island, (e) forming a thin layer of silicon oxide on the top and side surface of the island, (f) forming a conductive gate on the silicon oxide layer which extends across a portion of the top surface of the island and at least one side, and (g) forming source and drain regions in the island at opposite sides of the gate.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1990-05-04 | 1990-11-03 | 1991-05-05 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1994-05-04 | 1994-11-03 | 1995-05-05 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1998-05-04 | 1998-11-03 | 1999-05-05 | $7700.00 | Window Closed / Lapsed |