Method of manufacturing a semiconductor integrated circuit device

Claim 1

A method of manufacturing a semiconductor integrated circuit device comprising the steps of: selectively forming a plurality of first regions of a second conductivity type in said semiconductor substrate, said semiconductor substrate being of a first conductivity type; epitaxially growing a semiconductor layer of a second conductivity type on the surface of said semiconductor substrate, whereby said first regions become buried regions of the second conductivity type in said semiconductor substrate; introducing a first conductivity type impurity for forming an isolation layer into said semiconductor layer in order to obtain first and second island portions of the second conductivity type including said buried regions; introducing a first conductivity type impurity for forming a well region of the first conductivity type into said first island portion of said semiconductor layer; selectively forming a thick oxide film on the surface of said isolation layer by local oxidation; introducing a first conductivity type impurity for forming a base region of a transistor into said second island portion of said semiconductor layer; selectively forming gate insulator films on the surfaces of said well region and said first island portion; after the step of selectively forming gate insulator films on the surfaces of said well region and said first island portion, forming gate electrodes of MOSFETs on said gate insulator films, respectively; introducing a first conductivity type impurity for forming a source region and a drain region of a MOSFET of a channel of the first conductivity type into said first island portion, using said gate electrode formed on said first island portion as a mask; and introducing said second conductivity type impurity for forming an emitter region of said transistor into said base region and simultaneously introducing said second conductivity type impurity for forming a source region and a drain region of a MOSFET of the second conductivity type into said well region, using the gate electrode formed on said well region as a mask.

Claim 2

A method of manufacturing a semiconductor integrated circuit device comprising the steps of: selectively forming a plurality of first regions of a second conductivity type in said semiconductor substrate, said semiconductor substrate being of a first conductivity type; epitaxially growing a semiconductor layer of a second conductivity type on the surface of said semiconductor substrate, whereby said first regions become buried regions of the second conductivity type in said semiconductor substrate; introducing a first conductivity type impurity for forming an isolation layer into said semiconductor layer in order to obtain first and second island portions of the second conductivity type including said buried regions; introducing a first conductivity type impurity for forming a well region of the first conductivity type into said first island portion of said semiconductor layer; selectively forming a thick oxide film on the surface of said isolation layer by local oxidation; introducing a first conductivity type impurity for forming a base region of a transistor into said second island portion of said semiconductor layer; selectively forming gate insulator films on the surfaces of said well region and said first island portion; after the step of selectively forming gate insulator films on the surfaces of said well region and said first island portion, forming gate electrodes of MOSFETs on said gate insulator films, respectively; introducing a first conductivity type impurity for forming a source region and a drain region of a MOSFET of a channel of the first conductivity type into said first island portion, using said gate electrode formed on said first island portion as a mask; and introducing said second conductivity type impurity for forming an emitter region of said transistor into said base region and simultaneously introducing said second conductivity type impurity for forming a source region and a drain region of a MOSFET of the second conductivity type into said well region, using the gate electrode formed on said well region as a mask.