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US4646426A Expired / Lapsed US ⏱️ 0.0 years remaining

Method of producing MOS FET type semiconductor device

Assignee: Fujitsu Ltd
•
Filing: 1985-04-08
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Granted: 1987-03-03
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Expires: 2005-04-08
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Abstract

Abstract In the production of an MOS transistor or a one-MOS transistor one-capacitor memory cell, a gate electrode is made of aluminum, doped regions are formed by an ion-implantation method using the gate electrode as a mask, and the doped regions are annealed by a laser beam.

Inventors

  • 👤 Nobuo Sasaki

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-30 19:08
CPC Classifications
H; H10; H10B; H10B12/00; H10B12/30; H10D; H10D64/00; H10D64/60; H10D64/66; H10D64/665; H10P; H10P34/00; H10P34/40; H10P34/42; Y; Y10; Y10S; Y10S148/00; Y10S148/09; Y10S148/091; Y10S148/141

Claims Analysis

Total Claims: 6
Claim 1
Independent Claim 178 words
A method of producing a semiconductor memory device including one metal oxide semiconductor transistor and one capacitor formed on a semiconductor substrate, comprising the steps of: (a) forming a gate insulating layer on the semiconductor substrate; (b) forming an aluminum gate electrode on the gate insulating layer; (c) introducing impurities into the semiconductor substrate to form doped regions by ion-implanting the impurities using the aluminum gate as a mask; (d) annealing the doped regions by heating the semiconductor substrate to a temperature of from 200° C. to 300° C. and irradiating the semiconductor substrate with a laser beam having a wavelength of 0.9 μm or more; (e) oxidizing the aluminum gate electrode to form an aluminum oxide layer thereon; (f) forming an aluminum capacitor plate on the gate insulating layer and the aluminum oxide layer; (g) forming an intermediate insulating layer on the entire surface of said device; (h) opening windows through the gate insulating layer and the intermediate insulating layer to form contact holes; and (i) forming a patterned layer of aluminum on the intermediate insulating layer.
Claim 2
Independent Claim 178 words
A method of producing a semiconductor memory device including one metal oxide semiconductor transistor and one capacitor formed on a semiconductor substrate, comprising the steps of: (a) forming a gate insulating layer on the semiconductor substrate; (b) forming an aluminum gate electrode on the gate insulating layer; (c) introducing impurities into the semiconductor substrate to form doped regions by ion-implanting the impurities using the aluminum gate as a mask; (d) annealing the doped regions by heating the semiconductor substrate to a temperature of from 200° C. to 300° C. and irradiating the semiconductor substrate with a laser beam having a wavelength of 0.9 μm or more; (e) oxidizing the aluminum gate electrode to form an aluminum oxide layer thereon; (f) forming an aluminum capacitor plate on the gate insulating layer and the aluminum oxide layer; (g) forming an intermediate insulating layer on the entire surface of said device; (h) opening windows through the gate insulating layer and the intermediate insulating layer to form contact holes; and (i) forming a patterned layer of aluminum on the intermediate insulating layer.
Claim 3
Dependent Claim 25 words
A method according to claim 1, wherein said step (d) comprises irradiating a laser beam having an energy density of substantially 2 J/cm 2 .
Claim 4
Independent Claim 179 words
A method of producing a semiconductor memory device, including one metal oxide semiconductor transistor and one capacitor formed on a semiconductor substrate, comprising the steps of: (a) forming a gate insulating layer on the semiconductor substrate; (b) forming an aluminum capacitor plate on the gate insulating layer; (c) oxidizing the capacitor plate to form an aluminum oxide layer thereon; (d) forming an aluminum gate electrode on the gate insulating layer and on the aluminum oxide layer; (e) introducing impurities into the semiconductor substrate to form a doped region by ion-implantation using the aluminum gate electrode as a mask; (f) annealing the doped region by heating the semiconductor substrate to a temperature of from 200° C. to 300° C. and irradiating the semiconductor substrate with a laser beam having a wavelength of 0.9 μm or more; (g) forming an intermediate insulating layer on the entire surface of said device; (h) opening windows through both the gate insulating layer and the intermediate insulating layer to form contact holes; and (i) forming a patterned layer of aluminum on the intermediate insulating layer.
Claim 5
Independent Claim 179 words
A method of producing a semiconductor memory device, including one metal oxide semiconductor transistor and one capacitor formed on a semiconductor substrate, comprising the steps of: (a) forming a gate insulating layer on the semiconductor substrate; (b) forming an aluminum capacitor plate on the gate insulating layer; (c) oxidizing the capacitor plate to form an aluminum oxide layer thereon; (d) forming an aluminum gate electrode on the gate insulating layer and on the aluminum oxide layer; (e) introducing impurities into the semiconductor substrate to form a doped region by ion-implantation using the aluminum gate electrode as a mask; (f) annealing the doped region by heating the semiconductor substrate to a temperature of from 200° C. to 300° C. and irradiating the semiconductor substrate with a laser beam having a wavelength of 0.9 μm or more; (g) forming an intermediate insulating layer on the entire surface of said device; (h) opening windows through both the gate insulating layer and the intermediate insulating layer to form contact holes; and (i) forming a patterned layer of aluminum on the intermediate insulating layer.
Claim 6
Dependent Claim 25 words
A method according to claim 3, wherein said step (f) comprises irradiating a laser beam having an energy density of substantially 2 J/cm 2 .

References Cited (Backward Citations)

US3514844A Cited
US3808472A Cited
US4270262A Cited
US4243433A Cited
US4274193A Cited
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US4468855A Cited
US4441249A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1990-03-02 1990-09-01 1991-03-03 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1994-03-02 1994-09-01 1995-03-03 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1998-03-02 1998-09-01 1999-03-03 $7700.00 Window Closed / Lapsed

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