Method for making a closed gate MOS transistor with self-aligned contacts

Claim 1

The method of making a closed gate geometry MOS transistor comprising the steps of: (a) selecting a semiconductor substrate of a first conductivity type; (b) forming a first insulating layer on a surface of said substrate; (c) forming a conductive layer of semiconductor material on the surface of said first insulating layer; (d) forming a second insulating layer on the surface of said conductive layer; (e) forming a masking layer on the surface of said second insulating layer; (f) defining said masking layer into the form of closed gate geometries; (g) removing the portions of said second insulating layer, said conductive layer, and said first insulating layer which are exposed through said making layer, there being some undercutting of said masking layer during this step; (h) introducing conductivity modifiers, opposite in conductivity type to the conductivity of said substrate, into the exposed surface of said substrate, said conductivity modifiers being used to form the drain and source of said MOS transistor; (i) reforming an insulating layer over the exposed portions of said substrate and on the edges of said conductive layer; (j) applying a photoresist layer over the surface of said reformed insulating layer, and defining and developing said photoresist layer to expose portions of said reformed insulating layer where ohmic contact is to be made to said substrate; (k) removing the portions of said reformed insulating layer which directly underlies the edges of said masking layer; (l) removing the remaining portions of said photoresist layer and said masking layer; and (m) applying a metal layer over the surface of said device, and defining said metal layer to provide ohmic contacts and interconnects.

Claim 2

The method of making a closed gate geometry MOS transistor comprising the steps of: (a) selecting a semiconductor substrate of a first conductivity type; (b) forming a first insulating layer on a surface of said substrate; (c) forming a conductive layer of semiconductor material on the surface of said first insulating layer; (d) forming a second insulating layer on the surface of said conductive layer; (e) forming a masking layer on the surface of said second insulating layer; (f) defining said masking layer into the form of closed gate geometries; (g) removing the portions of said second insulating layer, said conductive layer, and said first insulating layer which are exposed through said making layer, there being some undercutting of said masking layer during this step; (h) introducing conductivity modifiers, opposite in conductivity type to the conductivity of said substrate, into the exposed surface of said substrate, said conductivity modifiers being used to form the drain and source of said MOS transistor; (i) reforming an insulating layer over the exposed portions of said substrate and on the edges of said conductive layer; (j) applying a photoresist layer over the surface of said reformed insulating layer, and defining and developing said photoresist layer to expose portions of said reformed insulating layer where ohmic contact is to be made to said substrate; (k) removing the portions of said reformed insulating layer which directly underlies the edges of said masking layer; (l) removing the remaining portions of said photoresist layer and said masking layer; and (m) applying a metal layer over the surface of said device, and defining said metal layer to provide ohmic contacts and interconnects.