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US3745647A Expired / Lapsed US ⏱️ 0.0 years remaining

Fabrication of semiconductor devices

Assignee: RCA Corp
•
Filing: 1970-10-07
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Granted: 1973-07-17
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Expires: 1990-10-07
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Abstract

Abstract An insulated gate, field effect transistor is fabricated by covering a surface of a body of doped semiconductor material with a first layer of a dielectric material covered by a second layer of a dielectric material masking layer covered by a third layer of a highly doped semiconductor material. The third layer is defined to provide a gate electrode having exposed sides, and the sides are covered with a protective thermally grown oxide layer, the masking second layer preventing the growth of the oxide layer on the surface of the body. Then, using the gate electrode as a mask, the second and first layers are removed to provide a gate structure comprising the three layers, and to expose surface portions of the body adjacent to the gate structure. Thereafter, the body is doped to provide the source and drain regions of the transistor, and metal contacts are provided covering the exposed surface portions.

Inventors

  • 👤 E Boleky

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-28 22:25
CPC Classifications
H; H10; H10D; H10D99/00; H10D48/00; H10D48/30; H10D48/32; H10D48/36; H10P; H10P95/00; Y; Y10; Y10S; Y10S148/00; Y10S148/043; Y10S148/122

Claims Analysis

Total Claims: 5
Claim 1
Independent Claim 27 words
A method as in claim 1 including the step of providing conductive contacts covering, and in direct contact with substantially the entire extent of said surface portions.
Claim 2
Independent Claim 150 words
A method of fabricating a field effect transistor comprising: providing a first layer of a dielectric material covering a surface of a body of doped semiconductor material, providing a second layer of a masking material covering said first layer, providing a third layer of a conductive material covering said second layer, defining said third layer to form a gate electrode having exposed sides, providing a protective coating impervious to the diffusion of certain conductivity modifiers therethrough on exposed sides of said gate electrode, said masking second layer preventing formation of said protective coating on portions of said body covered by said second layer, using said coated gate electrode as a mask, removing portions of said second and first layers to expose surface portions of said body immediately adjacent to said coated sides of said gate electrode, and driving said certain conductivity modifiers into said body through said exposed surface portions.
Claim 3
Dependent Claim 29 words
The method of claim 3 wherein said conductivity modifiers are caused to diffuse laterally under said gate structure a distance substantially equal to the thickness of said protective coating.
Claim 4
Dependent Claim 26 words
The method of claim 3 including the step of providing conductive contacts covering, and in direct contact with substantially the entire extent of said surface portions.
Claim 5
Dependent Claim 25 words
A method as in claim 1 wherein said conductive material is silicon, and said covering step comprises thermally growing a layer of silicon dioxide thereover.

References Cited (Backward Citations)

US3475234A Cited
US3566517A Cited
US3566457A Cited
US3576478A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1976-07-16 1977-01-15 1977-07-17 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1980-07-16 1981-01-15 1981-07-17 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1984-07-16 1985-01-15 1985-07-17 $7700.00 Window Closed / Lapsed

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