US4641165A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Dynamic memory device with an RC circuit for inhibiting the effects of alpha particle radiation
Assignee: Toshiba Corp
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Filing: 1983-03-15
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Granted: 1987-02-03
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Expires: 2003-03-15
Abstract
Abstract The dynamic memory device of the present invention is formed on an integrated semiconductor substrate subjected to alpha radiation and comprises a switching transistor having a switching terminal, an input-output terminal and a memory terminal; a bit line couple to said input-output terminal for supplying a charge to said transistor; a word line coupled to said switching terminal for controlling the switching of said transistor; and, an R-C circuit coupled to the memory terminal and comprising a charge storage capacitor for storing the charge supplied from said bit line and for substantially preventing loss of the stored charge due to particle radiation.
Inventors
- 👤 Tetsuya Iizuka
- 👤 Syuso Fujii
- 👤 Yukimasa Uchida
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-02 17:07
CPC Classifications
G; G11; G11C; G11C11/00; G11C11/21; G11C11/34; G11C11/40; G11C11/401; G11C11/403; G11C11/404; H; H10; H10B; H10B12/00; H10B12/30
Claims Analysis
Total Claims: 22
Claim 1
Independent Claim
128 words
A dynamic memory device formed in an integrated semi-conductor substrate and subjected to particle radiation comprising: a switching transistor having a switching terminal, an input-output terminal and a memory terminal; a bit line coupled to said input-output terminal for supplying a charge to said transistor; a word line coupled to said switching terminal for controlling the switching of said transistor; a resistance-capacitance circuit means, coupled to said memory terminal and comprising a resistor and a charge store capacitor and having a time constant which is greater than the funnelling time constant of the particle radiation, for storing the charge supplied from said bit line and for substantially preventing loss of the stored charge due to said particle radiation; and a potential reference coupled to said resistance-capacitance circuit means.
Claim 2
Dependent Claim
128 words
A dynamic memory device formed in an integrated semi-conductor substrate and subjected to particle radiation comprising: a switching transistor having a switching terminal, an input-output terminal and a memory terminal; a bit line coupled to said input-output terminal for supplying a charge to said transistor; a word line coupled to said switching terminal for controlling the switching of said transistor; a resistance-capacitance circuit means, coupled to said memory terminal and comprising a resistor and a charge store capacitor and having a time constant which is greater than the funnelling time constant of the particle radiation, for storing the charge supplied from said bit line and for substantially preventing loss of the stored charge due to said particle radiation; and a potential reference coupled to said resistance-capacitance circuit means.
Claim 3
Dependent Claim
15 words
The dynamic memory device of claim 1 wherein said potential reference is a power supply.
Claim 4
Dependent Claim
24 words
The dynamic memory device of claim 1 wherein said potential reference is the potential supplied by a word line of an adjacent memory device.
Claim 5
Dependent Claim
14 words
The dynamic memory device of claim 1 wherein said potential reference is ground potential.
Claim 6
Dependent Claim
36 words
The dynamic memory device of claim 1 wherein said capacitor comprises an electrode formed by a high resistance wiring layer and is coupled to the potential supplied by a word line of an adjacent memory device.
Claim 7
Dependent Claim
28 words
The dynamic memory means device of claim 1 wherein said capacitor comprises an electrode formed by a high resistance wiring layer which is electrically isolated from said substrate.
Claim 8
Dependent Claim
18 words
The dynamic memory device of claim 1 wherein said resistor and charge store capacitor are connected in series.
Claim 9
Dependent Claim
30 words
The dynamic memory device of claim 1 wherein one terminal of said resistor is connected to said memory terminal and the other terminal is connected to said charge store capacitor.
Claim 10
Dependent Claim
30 words
The dynamic memory device of claim 1 wherein one terminal of said charge store capacitor is connected to said memory terminal and the other terminal is connected to said resistor.
Claim 11
Dependent Claim
15 words
The dynamic memory device of claim 7 wherein said potential reference is a power supply.
Claim 12
Dependent Claim
24 words
The dynamic memory device of claim 7 wherein said potential reference is the potential supplied by a word line of an adjacent memory device.
Claim 13
Dependent Claim
14 words
The dynamic memory device of claim 7 wherein said potential reference is ground potential.
Claim 14
Dependent Claim
36 words
The dynamic memory device of claim 7 wherein said capacitor comprises an electrode formed by a high resistance wiring layer and is coupled to the potential supplied by a word line of an adjacent memory device.
Claim 15
Dependent Claim
28 words
The dynamic memory means device of claim 7 wherein said capacitor comprises an electrode formed by a high resistance wiring layer which is electrically isolated from said substrate.
Claim 16
Dependent Claim
143 words
A dynamic memory device formed in an integrated semi-conductor substrate and subjected to particle radiation comprising: a switching transistor having a switching terminal, an input-output terminal and a memory terminal; a bit line coupled to said input-output terminal for supplying a charge to said transistor; a word line coupled to said switching terminal for controlling the switching of said transistor; a resistance-capacitance circuit means, coupled to said memory terminal and comprising a resistor and a charge store capacitor which comprises an electrode formed by a high resistance wiring layer, for storing the charge supplied from said bit line and for substantially preventing loss of the stored charge due to said particle radiation; a potential reference coupled to said resistance-capacitance circuit means; and a low resistance wiring layer coupled to said high resistance wiring layer for supplying said reference potential to said capacitor electrode.
Claim 17
Dependent Claim
143 words
A dynamic memory device formed in an integrated semi-conductor substrate and subjected to particle radiation comprising: a switching transistor having a switching terminal, an input-output terminal and a memory terminal; a bit line coupled to said input-output terminal for supplying a charge to said transistor; a word line coupled to said switching terminal for controlling the switching of said transistor; a resistance-capacitance circuit means, coupled to said memory terminal and comprising a resistor and a charge store capacitor which comprises an electrode formed by a high resistance wiring layer, for storing the charge supplied from said bit line and for substantially preventing loss of the stored charge due to said particle radiation; a potential reference coupled to said resistance-capacitance circuit means; and a low resistance wiring layer coupled to said high resistance wiring layer for supplying said reference potential to said capacitor electrode.
Claim 18
Dependent Claim
17 words
The dynamic memory device of claim 15 wherein said capacitor electrode is electrically isolated from said substrate.
Claim 19
Dependent Claim
15 words
The dynamic memory device of claim 15 wherein said potential reference is a power supply.
Claim 20
Dependent Claim
24 words
The dynamic memory device of claim 15 wherein said potential reference is the potential supplied by a word line of an adjacent memory device.
Claim 21
Dependent Claim
14 words
The dynamic memory device of claim 15 wherein said potential reference is ground potential.
Claim 22
Dependent Claim
36 words
The dynamic memory device of claim 15 wherein said capacitor comprises an electrode formed by a high resistance wiring layer and is coupled to the potential supplied by a word line of an adjacent memory device.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1990-02-02 | 1990-08-04 | 1991-02-03 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1994-02-02 | 1994-08-04 | 1995-02-03 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1998-02-02 | 1998-08-04 | 1999-02-03 | $7700.00 | Window Closed / Lapsed |