Semiconductor memory device

Claim 1

A semiconductor memory device for reading and writing data in response to selected input signals, comprising in combination: a semiconductor material substrate having a first conductivity and including, adjacent to a given surface thereof, a doped region of a second conductivity opposite to said first conductivity, and further including a gate region adjacent to said doped region, and a memory cell region adjacent to said gate region and remote from said doped region; memory cell electrode means disposed above said given surface and above said memory cell region, and responsive to said selected input signals for respectively assuming one of a plurality of potentials; gate electrode means disposed above said given surface and above said gate region, and responsive to said selected input signals for respectively assuming one of said plurality of potentials; and insulation means between said memory cell and gate electrode means, and said substrate, for electrically shielding the latter from the former; said gate electrode means including, immediately adjacent to said memory cell electrode means, a resistive means for establishing a linear potential transition from the potential of said gate electrode means to that of said memory cell electrode means; whereby, in response to said selected input signals, electrical charge is selectably transferred to and from said doped region, respectively, from and to said memory cell region, in a speedy manner.