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US4636658A Expired / Lapsed US ⏱️ 0.0 years remaining

Voltage detecting device

Assignee: Fujitsu Ltd
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Filing: 1985-02-25
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Granted: 1987-01-13
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Expires: 2005-02-25
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Abstract

Abstract A voltage detecting device including a voltage dividing circuit (VD) formed by two capacitors (C 1 ', C 2 ) connected in series, an inverter circuit (INV) for detecting whether the potential at the common node (N 1 ) of the capacitors (C 1 ', C 2 ) reaches a predetermined value, and a switching transistor (Q 3 ) linked between the common node (N 1 ) and a power supply terminal (GND). When a voltage (INP 0 ) is not applied to the voltage dividing circuit (VD), the switching transistor (Q 3 ) is turned on so as to expel the charges at the common node (N 1 ).

Inventors

  • 👤 Hideki Arakawa

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-29 12:30
CPC Classifications
G; G01; G01R; G01R27/00; H; H03; H03K; H03K17/00; H03K17/22; G01R19/00; G01R19/165; G01R19/16504; G01R19/16519

Claims Analysis

Total Claims: 8
Claim 1
Independent Claim 115 words
A voltage detecting device comprising: first terminal means to which a detected voltage is to be applied; second terminal means; a voltage dividing circuit comprising: a first capacitor linked between said first terminal means and a common node and a second capacitor linked between the common node and said second terminal means; switching means linked between the common node and said second terminal means; a first means, connected to the common node, for generating an output signal, when the potential at the common node reaches a predetermined value; and a second means, connected to said switching means, for turning on said switching means when said detected voltage is not applied to said first terminal means.
Claim 2
Dependent Claim 115 words
A voltage detecting device comprising: first terminal means to which a detected voltage is to be applied; second terminal means; a voltage dividing circuit comprising: a first capacitor linked between said first terminal means and a common node and a second capacitor linked between the common node and said second terminal means; switching means linked between the common node and said second terminal means; a first means, connected to the common node, for generating an output signal, when the potential at the common node reaches a predetermined value; and a second means, connected to said switching means, for turning on said switching means when said detected voltage is not applied to said first terminal means.
Claim 3
Dependent Claim 39 words
A device as set forth in claim 1, wherein said first capacitor comprises a monocrystalline silicon layer, a silicon dioxide layer obtained by oxidizing said monocrystalline silicon layer, and a polycrystalline silicon layer formed on said silicon dioxide layer.
Claim 4
Dependent Claim 41 words
A device as set forth in claim 1 or 2, wherein said second capacitor comprises a monocrystalline silicon layer, a silicon dioxide layer obtained by oxidizing said monocrystalline silicon layer, and a polycrystalline silicon layer formed on said silicon dioxide layer.
Claim 5
Dependent Claim 37 words
A device as set forth in claim 1, wherein said first capacitor comprises two polycrystalline silicon layers having a silicon dioxide layer therebetween, said silicon dioxide layer being obtained by oxidizing one of said polycrystalline silicon layers.
Claim 6
Dependent Claim 37 words
A device as set forth in claim 1, wherein said second capacitor comprises two polycrystalline silicon layers having a silicon dioxide layer therebetween, said silicon dioxide layer being obtained by oxidizing one of said polycrystalline silicon layers.
Claim 7
Dependent Claim 37 words
A device as set forth in claim 4, wherein said second capacitor comprises two polycrystalline silicon layers having a silicon dioxide layer therebetween, said silicon dioxide layer being obtained by oxidizing one of said polycrystalline silicon layers.
Claim 8
Dependent Claim 18 words
A voltage detecting device as set forth in claim 1, wherein said first means comprises an inverter (INV).

References Cited (Backward Citations)

US4451748A Cited
US4521696A Cited
US4543594A Cited
US4527180A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1990-01-12 1990-07-14 1991-01-13 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1994-01-12 1994-07-14 1995-01-13 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1998-01-12 1998-07-14 1999-01-13 $7700.00 Window Closed / Lapsed

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