Patent US4629909A successfully refreshed from Google Patents.
US4629909A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Flip-flop for storing data on both leading and trailing edges of clock signal
Assignee: AMI Semiconductor Inc
•
Filing: 1984-10-19
•
Granted: 1986-12-16
•
Expires: 2004-10-19
Abstract
Abstract A flip-flop stores input data on both the leading and trailing edges of a clock pulse. The flip-flop includes a data path responsive to the leading edge of a clock pulse and a second data path responsive to the trailing edge of a clock pulse, thereby allowing data to be stored on both the leading edge and the trailing edge of a clock pulse.
Inventors
- 👤 Kelly B. Cameron
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-24 18:48
CPC Classifications
H; H03; H03K; H03K17/00; H03K17/51; H03K17/56; H03K17/687; H03K17/693; H03K17/689; H03K17/691; H03K3/00; H03K3/02; H03K3/353; H03K3/356; H03K3/356017; H03K3/356104; H03K3/356113
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
153 words
A flip-flop having a data input terminal for receiving a data input signal, a data output terminal for providing data output signals, and a clock input terminal for receiving a clock input signal, comprising: first storage means coupled to said data input terminal and having an output lead connected to said output terminal, wherein said first storage means stores said data input signal when said clock input signal is at a first level and provides said stored data input signal on said output lead while said clock input signal is at a second level; and second storage means coupled to said data input terminal and having an output lead connected to said output terminal, wherein said second storage means stores said data input signal when said clock signal is at said second level and provides said stored data input signal on said output lead when said clock signal is at said first level.
Claim 2
Dependent Claim
153 words
A flip-flop having a data input terminal for receiving a data input signal, a data output terminal for providing data output signals, and a clock input terminal for receiving a clock input signal, comprising: first storage means coupled to said data input terminal and having an output lead connected to said output terminal, wherein said first storage means stores said data input signal when said clock input signal is at a first level and provides said stored data input signal on said output lead while said clock input signal is at a second level; and second storage means coupled to said data input terminal and having an output lead connected to said output terminal, wherein said second storage means stores said data input signal when said clock signal is at said second level and provides said stored data input signal on said output lead when said clock signal is at said first level.
Claim 3
Dependent Claim
17 words
A flip-flop as in claim 1 wherein said flip-flop is constructed using complementary metal oxide semiconductor technology.
Claim 4
Dependent Claim
143 words
A flip-flop having a data input terminal for receiving a data input signal, a data output terminal for providing data output signals, and a clock input terminal for receiving a clock input signal, comprising: first storage means coupled to said data input terminal and having an output lead connected to said output terminal, wherein said first storage means stores said data input signal when the leading edge of a clock pulse is provided by said clock input and provides said stored data input signal on said output lead; and second storage means coupled to said data input terminal and having an output lead connected to said output terminal, wherein said second storage means stores said data input signal when the trailing edge of a clock pulse is provided by said clock signal and provides said stored data input signal on said output lead.
Claim 5
Dependent Claim
143 words
A flip-flop having a data input terminal for receiving a data input signal, a data output terminal for providing data output signals, and a clock input terminal for receiving a clock input signal, comprising: first storage means coupled to said data input terminal and having an output lead connected to said output terminal, wherein said first storage means stores said data input signal when the leading edge of a clock pulse is provided by said clock input and provides said stored data input signal on said output lead; and second storage means coupled to said data input terminal and having an output lead connected to said output terminal, wherein said second storage means stores said data input signal when the trailing edge of a clock pulse is provided by said clock signal and provides said stored data input signal on said output lead.
Claim 6
Dependent Claim
17 words
A flip-flop as in claim 3 wherein said flip-flop is constructed using complementary metal oxide semiconductor technology.
Claim 7
Dependent Claim
27 words
A flip-flop as in claim 3, including gated inverter means coupled between said data input and data output terminals for providing data control and output signal buffering.
References Cited (Backward Citations)
US3909633A
Cited
US3917961A
Cited
US4101790A
Cited
US4112506A
Cited
US4390987A
Cited
US4506167A
Cited
US4495628A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1989-12-15 | 1990-06-16 | 1990-12-16 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1993-12-15 | 1994-06-16 | 1994-12-16 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1997-12-15 | 1998-06-16 | 1998-12-16 | $7700.00 | Window Closed / Lapsed |