Patent US4604644A successfully refreshed from Google Patents.
US4604644A
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Solder interconnection structure for joining semiconductor devices to substrates that have improved fatigue life, and process for making
Assignee: International Business Machines Corp
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Filing: 1985-01-28
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Granted: 1986-08-05
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Expires: 2005-01-28
Abstract
Abstract An improved solder interconnection for forming I/O connections between an integrated semiconductor device and a support substrate having a plurality of solder connections arranged in an area array joining a set of I/O's on a flat surface of the semiconductor device to a corresponding set of solder wettable pads on a substrate, the improvement being a band of dielectric organic material disposed between and bonded to the device and substrate embedding at least an outer row of solder connections leaving the center inner solder connections and the adjacent top and bottom surfaces free of dielectric material.
Inventors
- 👤 Keith F. Beckham
- 👤 Anne E. Kolman
- 👤 Kathleen M. McGuire
- 👤 Karl J. Puttlitz
- 👤 Horatio Quinones
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-24 13:16
CPC Classifications
H; H05; H05K; H05K3/00; H05K3/30; H05K3/32; H05K3/34; H05K3/341; H05K3/3431; H05K3/3436; H10; H10W; H10W74/00; H10W74/01; H10W74/012; H10W74/10; H10W74/15; H05K2201/00; H05K2201/10; H05K2201/10613; H05K2201/10954; H05K2201/10977; H05K3/22; H05K3/28; H05K3/284; H10W72/00; H10W72/30; H10W72/341; H10W72/344; H10W72/851; H10W72/853; H10W72/856; H10W90/00; H10W90/701; H10W90/721; H10W90/724; H10W90/731; H10W90/734; Y; Y02; Y02P; Y02P70/00; Y02P70/50; Y10; Y10T; Y10T29/00; Y10T29/49; Y10T29/49002; Y10T29/49117; Y10T29/49124; Y10T29/4913; Y10T29/49144
Claims Analysis
Total Claims: 17
Claim 1
Independent Claim
108 words
An improved solder interconnection for forming I/O connections between an integrated semiconductor device and a support substrate comprising a plurality of solder connections arranged in an area array joining a set of I/O's on a flat surface of said semiconductor device to a corresponding set of solder wettable pads on a substrate, a band of dielectric organic material disposed between and bonded to said device and substrate embedding at least an outer row of solder connections, and leaving the central inner solder connections and the central underside device surface and opposing substrate surface and also the top surface of the device being free of said dielectric organic material.
Claim 2
Dependent Claim
108 words
An improved solder interconnection for forming I/O connections between an integrated semiconductor device and a support substrate comprising a plurality of solder connections arranged in an area array joining a set of I/O's on a flat surface of said semiconductor device to a corresponding set of solder wettable pads on a substrate, a band of dielectric organic material disposed between and bonded to said device and substrate embedding at least an outer row of solder connections, and leaving the central inner solder connections and the central underside device surface and opposing substrate surface and also the top surface of the device being free of said dielectric organic material.
Claim 3
Dependent Claim
52 words
The solder interconnection structure of claim 1 wherein said band of dielectric material covers as a minimum a single outer peripherial row and column, and as a maximum the rows and columns outside the line where the normal axial displacement of the solder terminals is zero when no dielectric material is present.
Claim 4
Dependent Claim
17 words
The solder interconnection of claim 1 wherein said band of dielectric organic material is a polyamide-imide polymer.
Claim 5
Dependent Claim
40 words
The solder interconnection of claim 1 wherein said band of dielectric material is a polymer formed by reacting P,P'-diaminodiphenylmethane with trimellitic anhydride or acychloride of trimellitic anhydride, and further reacting with gamma-aminopropyl triethoxy silane or β- (3,4-epoxy cyclohexyl) ethyltrimethoxy silane.
Claim 6
Dependent Claim
32 words
The solder interconnection of claim 1 wherein said solder interconnections are arranged in columns and rows and are uniformly disposed over the entire face of said device underside surface facing said substrate.
Claim 7
Dependent Claim
27 words
The solder interconnection of claim 5 wherein the spacing on a center-to-center basis of said solder interconnection grid is in the range of 4 to 20 mils.
Claim 8
Dependent Claim
29 words
The solder interconnection structure of claim 6 wherein said band of dielectric material embeds substantially the region of the device where the solder connections are outside the compression zone.
Claim 9
Dependent Claim
24 words
The solder interconnection of claim 1 wherein the spacing between said device and said substrate is in the range of 2 to 10 mils.
Claim 10
Dependent Claim
24 words
The solder interconnection of claim 8 wherein the spacing between said device and said substrate is in the range of 2 to 4 mils.
Claim 11
Dependent Claim
14 words
The solder interconnection of claim 1 wherein said substrate supports a plurality of devices.
Claim 12
Dependent Claim
21 words
The solder interconnection of claim 1 wherein said device is formed of monocrystalline Si and said substrate is formed of alumina.
Claim 13
Independent Claim
69 words
A method of increasing the fatigue life of solder interconnections between a semiconductor device and a supporting substrate comprising: attaching said device to said substrate and applying a dielectric material exclusively to the peripheral solder connections whereby the connections are embedded leaving the inner connections unembedded, said material adherent to both the device and the substrate whereby said top surface of said device is free of said dielectric material.
Claim 14
Independent Claim
69 words
A method of increasing the fatigue life of solder interconnections between a semiconductor device and a supporting substrate comprising: attaching said device to said substrate and applying a dielectric material exclusively to the peripheral solder connections whereby the connections are embedded leaving the inner connections unembedded, said material adherent to both the device and the substrate whereby said top surface of said device is free of said dielectric material.
Claim 15
Dependent Claim
13 words
The method of claim 12 wherein said dielectric material is a polyamide-imide polymer.
Claim 16
Dependent Claim
32 words
The method of claim 13 wherein said dielectric material is a polymer formed by reacting P,P' diaminodiphenylmethane with trimellitic anhydride, and further reacting with gamma-aminopropyl triethoxy silane or beta-(3,4-epoxy cyclohexyl) ethyltrimethoxy silane.
Claim 17
Dependent Claim
50 words
The method of claim 14 wherein said dielectric material is applied to the solder connections by dispensing a liquid mixture of an organic resin, an adhesion promoter and a solvent along the device peripheral edge and allowing the liquid to be drawn between the device an substrate by surface tension.
References Cited (Backward Citations)
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1989-08-04 | 1990-02-03 | 1990-08-05 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1993-08-04 | 1994-02-03 | 1994-08-05 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1997-08-04 | 1998-02-03 | 1998-08-05 | $7700.00 | Window Closed / Lapsed |