Patent US4602420A successfully refreshed from Google Patents.
US4602420A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method of manufacturing a semiconductor device
Assignee: Toshiba Corp
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Filing: 1984-12-13
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Granted: 1986-07-29
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Expires: 2004-12-13
Abstract
Abstract A method of manufacturing a semiconductor device including the steps of forming a passivation film, which has an opening exposing that region of the interlayer insulation film formed on the fuse element, which corresponds to the region to be melted of fuse element, melting the region of the fuse element to be melted by radiating a laser beam on the exposed region of the interlayer insulation film through the opening, and the step of forming a protective resin layer on the whole main surface of the resultant structure after melting is completed.
Inventors
- 👤 Shozo Saito
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 15:13
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/40; H10W20/49; H10W20/493; H10W20/494; H10P; H10P34/00; H10P34/40; H10P34/42; Y; Y10; Y10S; Y10S148/00; Y10S148/055; Y10S148/093
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
145 words
A method of manufacturing a semiconductor device comprising the steps of: forming a field insulation film on a semiconductor substrate; forming a fuse element on said field insulation film; forming an interlayer insulation film, which has a hole leading to said fuse element, on said fuse element; forming wiring layers, which contact said fuse element through said hole, on said interlayer insulation film; forming a passivation film, which has an opening above said interlayer insulation film and a region corresponding to the region of said fuse element to be melted, over the whole main surface of the resultant structure; melting an exposure region of said interlayer insulation film that is exposed by said opening and said region of said fuse element to be melted using a melting method; and forming a protective layer on the whole surface of the resultant structure after said melting step.
Claim 2
Independent Claim
145 words
A method of manufacturing a semiconductor device comprising the steps of: forming a field insulation film on a semiconductor substrate; forming a fuse element on said field insulation film; forming an interlayer insulation film, which has a hole leading to said fuse element, on said fuse element; forming wiring layers, which contact said fuse element through said hole, on said interlayer insulation film; forming a passivation film, which has an opening above said interlayer insulation film and a region corresponding to the region of said fuse element to be melted, over the whole main surface of the resultant structure; melting an exposure region of said interlayer insulation film that is exposed by said opening and said region of said fuse element to be melted using a melting method; and forming a protective layer on the whole surface of the resultant structure after said melting step.
Claim 3
Dependent Claim
26 words
A method of manufacturing a semiconductor device according to claim 1, wherein said melting method of said fuse element is with radiation by a laser beam.
Claim 4
Dependent Claim
18 words
A method of manufacturing a semiconductor device according to claim 1, wherein said protective layer is a resin.
Claim 5
Dependent Claim
21 words
A method of manufacturing a semiconductor device according to claim 3, wherein said resin layer has an alpha particle screening effect.
Claim 6
Dependent Claim
19 words
A method of manufacturing a semiconductor device according to claim 4, wherein said resin layer is a polyimide resin.
Claim 7
Dependent Claim
21 words
A method of manufacturing a semiconductor device according to claim 1, wherein said interlayer insulation film is substantially 3000 Å thick.
Claim 8
Dependent Claim
19 words
A method of manufacturing a semiconductor device according to claim 1, wherein said passivation layer is 10,000 Å thick.
Claim 9
Dependent Claim
46 words
A method of manufacturing a semiconductor device according to claim 1, wherein said step of forming said interlayer insulation film includes the steps of forming an insulation film on said fuse element by CVD (chemical vapour deposition), and patterning said insulation film by PEP (photoengraving process).
Claim 10
Dependent Claim
43 words
A method of manufacturing a semiconductor device according to claim 1, wherein said step of forming said passivation film includes the steps of forming a passivation layer over the whole main surface of the resultant structure and patterning said passivation layer by PEP.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1989-07-28 | 1990-01-27 | 1990-07-29 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1993-07-28 | 1994-01-27 | 1994-07-29 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1997-07-28 | 1998-01-27 | 1998-07-29 | $7700.00 | Window Closed / Lapsed |