Digital recording apparatus with disparity reducing encoder

Claim 2

Apparatus for transcribing digital data wherein first digital words containing a first number of first and second polarity bits are assigned code patterns chosen from a plurality of second digital words containing a larger second number of first and second polarity bits and wherein at least some of the first digital words are assigned at least two alternative code patterns and none of the code patterns contain a single bit of a first polarity with bits of the second polarity on both sides thereof, comprising: first means having an input for receiving the plurality of first digital words and operable to produce an output of second digital words corresponding to the assigned code patterns, and second means connected to the first means to test the second digital words and to cause an alternative code pattern for a word to appear in the output upon the occurrence of the existence of a single bit of the first polarity at the start of any particular second digital word followed by a bit of the second polarity, and preceded by a second digital word having a bit at the end thereof which is of the second polarity and the second means selects an alternative code pattern for the particular word so that it has a starting bit of the second polarity.

Claim 3

Apparatus for use in changing a plurality of 4 bit binary words into a plurality of 8 bit binary patterns according to a predetermined assignment arrangement which includes alternate 8 bit binary patterns for those patterns having an unequal number of "0"'s and "1"'s, the alternate patterns having the same inequality in "0"'s and "1"'s but in the opposite sense, and includes alternate 8 bit patterns for those patterns ending with a single bit of one sense, the alternate patterns having a first form starting with a bit of the one sense, and a second form starting with a bit of the opposite sense, comprising: first means for receiving the 4 bit words, determining the assigned 8 bit binary pattern and producing a first output if the assigned 8 bit binary pattern has an unequal number of "0"'s and "1"'s and a second output indicative of the sense of the first bit of the next successive 8 bit binary pattern in the plurality; and second means for receiving the 4 bit words and connected to the first means to receive the first and second outputs, the second means operable to produce a third output representing the 8 bit binary pattern assigned to the 4 bit word and choosing the pattern and its alternate in accordance with the first and second outputs to hold the overall number of "0"'s and "1"'s in succssive words to substantial equality and to assure that at least 2 bits exist between transitions that change sense to avoid frequency increase.

Claim 4

Apparatus for use in changing a plurality of 4 bit binary words into a plurality of 8 bit binary patterns according to a predetermined assignment arrangement which includes alternate 8 bit binary patterns for those patterns having an unequal number of "0"'s and "1"'s, the alternate patterns having the same inequality in "0"'s and "1"'s but in the opposite sense, and includes alternate 8 bit patterns for those patterns ending with a single bit of one sense, the alternate patterns having a first form starting with a bit of the one sense, and a second form starting with a bit of the opposite sense, comprising: first means for receiving the 4 bit words, determining the assigned 8 bit binary pattern and producing a first output if the assigned 8 bit binary pattern has an unequal number of "0"'s and "1"'s and a second output indicative of the sense of the first bit of the next successive 8 bit binary pattern in the plurality; and second means for receiving the 4 bit words and connected to the first means to receive the first and second outputs, the second means operable to produce a third output representing the 8 bit binary pattern assigned to the 4 bit word and choosing the pattern and its alternate in accordance with the first and second outputs to hold the overall number of "0"'s and "1"'s in succssive words to substantial equality and to assure that at least 2 bits exist between transitions that change sense to avoid frequency increase.

Claim 5

Apparatus according to claim 2 including a bistable device connected to the first means and operable to produce a change of state signal upon the occurrence of the first output and said second means is connected to the bistable device to receive the change of state signal and to choose the 8 bit pattern and its alternate in accordance with the state of the bistable device.

Claim 6

Apparatus according to claim 3 further including a 5 bit memory having a first input connected to receive the 4 bit word, a second input connected to receive the change of state signal, the second means connected to the 5 bit memory to receive the 4 bit signal and the change of state signal a predetermined time period after the first means receives the 4 bit word during which predetermined time period the first means receives at least the first bit of the next successive 4 bit word and produces the second output in accordance therewith.

Claim 7

Apparatus according to claim 4 further including an 8 bit memory connected to receive the third output and to hold the 8 bit pattern, the present pattern, thereon for a second predetermined time period during which second predetermined time period the sense of the last bit of the previous 8 bit pattern, the previous pattern, is determined and produced as a fourth output and producing the third output in accordance therewith to prevent the occurrence of single bit transitions between the previous pattern and the present pattern.

Claim 8

Apparatus for use in transcribing a series of digital 4 bit words into a tape recorder comprising: first means operable to receive the series of 4 bit words and to select 8 bit words to represent them, the 8 bit words being chosen from a predetermined group, some of which have a D.C. weight of +4, some of which have a D.C. weight of -4, some of which have a D.C. weight of +8 and some of which have a D.C. weight of -8; and second means operable to alternately select 8 bit words of D.C. weight of +4 and -4 so that the overall average from the words is substantially zero and to alternately select words of D.C. weight +8 and -8 except when a word having a D.C. weight of ±8 is followed by a word having a D.C. weight of ±4, in which event the second means interrupts such alternation after that word having the D.C. weight of ±4 and then resume alternating after the following word having any D.C. weight.

Claim 9

Apparatus for use in transcribing a series of digital 4 bit words into a tape recorder comprising: first means operable to receive the series of 4 bit words and to select 8 bit words to represent them, the 8 bit words being chosen from a predetermined group, some of which have a D.C. weight of +4, some of which have a D.C. weight of -4, some of which have a D.C. weight of +8 and some of which have a D.C. weight of -8; and second means operable to alternately select 8 bit words of D.C. weight of +4 and -4 so that the overall average from the words is substantially zero and to alternately select words of D.C. weight +8 and -8 except when a word having a D.C. weight of ±8 is followed by a word having a D.C. weight of ±4, in which event the second means interrupts such alternation after that word having the D.C. weight of ±4 and then resume alternating after the following word having any D.C. weight.

Claim 10

Apparatus according to claim 6 wherein the second means includes a flip flop that normally changes state upon the occurrence of a word having any D.C. weight and includes a logic circuit which detects the presence of a word having a D.C. weight of ±8 followed by a word having a D.C. weight of ±4 after which the logic circuit inhibits the flip flop for one state change.

Claim 11

Apparatus according to claim 6 further including third means to determine the D.C. weight of the first bit of the next word ahead in the series and the D.C. weight of the last bit of the previous word behind in the series and operates to cause the second means to select an 8 bit word that starts and ends with bits of D.C. weight such that in the series there will always be at least two bits of the same D.C. weight side by side.

Claim 12

Apparatus for transcribing digital data wherein first digital words containing a first number of "1" and "0" opposite sense bit are assigned code patterns chosen from a plurality of second digital words containing a larger second number of "1" and "0" opposite sense bits and wherein at least some of the first digital words are assigned at least two alternative code patterns and none of the code patterns contain a single bit of a first sense with bits of the opposite sense on both sides thereof, comprising: first means having an input for receiving the plurality of first digital words and operable to produce an output of second digital words corresponding to the assigned code patterns, and second means connected to the first means to test the second digital words and to cause an alternative code pattern for a word to appear in the output upon the occurrence of the existence of a single bit of a first sense at the end of any particular second digital word preceded by a bit of opposite sense, followed by a second digital word having a bit at the start thereof which is of opposite sense and the second means selects an alternative code pattern for the particular word so that it has an ending bit of the opposite sense.

Claim 13

Apparatus for transcribing digital data wherein first digital words containing a first number of "1" and "0" opposite sense bit are assigned code patterns chosen from a plurality of second digital words containing a larger second number of "1" and "0" opposite sense bits and wherein at least some of the first digital words are assigned at least two alternative code patterns and none of the code patterns contain a single bit of a first sense with bits of the opposite sense on both sides thereof, comprising: first means having an input for receiving the plurality of first digital words and operable to produce an output of second digital words corresponding to the assigned code patterns, and second means connected to the first means to test the second digital words and to cause an alternative code pattern for a word to appear in the output upon the occurrence of the existence of a single bit of a first sense at the end of any particular second digital word preceded by a bit of opposite sense, followed by a second digital word having a bit at the start thereof which is of opposite sense and the second means selects an alternative code pattern for the particular word so that it has an ending bit of the opposite sense.

Claim 14

Apparatus for changing a series of 4 bit binary words into a series of 8 bit binary patterns according to a predetermined assignment arrangement so that no frequency increase occurs comprising: first means for receiving the 4 bit words and producing a first output indicative of the sense of the first bit of the 8 bit binary patterns; second means for receiving the 8 bit binary patterns and producing a second output indicative of the sense of the last bit thereof; and third means for receiving the 4 bit binary words and the first and second outputs and determining therefrom the form of the 8 bit binary patterns so that no two changes of sense can occur separated by a single bit, and producing a third output in accordance therewith.

Claim 15

Apparatus for changing a series of 4 bit binary words into a series of 8 bit binary patterns according to a predetermined assignment arrangement so that no frequency increase occurs comprising: first means for receiving the 4 bit words and producing a first output indicative of the sense of the first bit of the 8 bit binary patterns; second means for receiving the 8 bit binary patterns and producing a second output indicative of the sense of the last bit thereof; and third means for receiving the 4 bit binary words and the first and second outputs and determining therefrom the form of the 8 bit binary patterns so that no two changes of sense can occur separated by a single bit, and producing a third output in accordance therewith.

Claim 16

Apparatus according to claim 10 wherein the first means comprises a first look up table to determine the form of the 8 bit binary patterns and produce the first output based thereon.

Claim 17

Apparatus according to claim 10 wherein the third means includes a memory to store the 4 bit binary words for a predetermined time which time is sufficient to allow the first means to produce the first output as an indication of the sense of the first bit of the next 8 bit binary patterns in the series.

Claim 18

Apparatus according to claim 10 wherein the third means includes a look up table which receives each 4 bit binary words in the series and determines the desired 8 bit binary patterns therefor, the first output being indicative of the sense of the first bit of the next in the series and the second output being indicative of the sense of the last bit of the previous 8 bit arrangement.

Claim 19

Apparatus according to claim 13 wherein the second means includes an 8 bit memory to receive the third output and store it temporarily for release as a resultant output.