US4358852A
Expired / Lapsed
US
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Method of modulation and demodulation of data and apparatus for carrying out the same
Assignee: Sony Corp
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Filing: 1980-04-21
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Granted: 1982-11-09
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Expires: 2000-04-21
Abstract
Abstract A method of modulation and demodulation of data converts data words of four bits to converted data words of twelve bits according to a normal coding scheme in which successive marks or "1" bits are separated by at least five spaces or "0" bits. At least two consecutive four-bit data words are furnished to a logic device that detects whether the last "1" bit of one converted data word corresponding thereto according to the normal coding scheme will be less than five bits from the first "1" bit in the next converted data word, and provides appropriate key bits; and converted data words are selectively provided according to the normal coding scheme and according to an alternate coding scheme in response to such key bits, so that in the modulated data, the "1" bits are always separated from each other by at least five "0" bits. For demodulation, a logic device provides a discrimination bit depending upon whether the converted data words have been modulated according to the normal or the alternate coding scheme, and a selector responsive to the discriminator bit selects data words according to the normal coding scheme and according to the alternate coding scheme. The apparatus for modulating data preferably includes an addressable ROM as a coding device.
Inventors
- 👤 Shunsuke Ichikawa
- 👤 Masato Tanaka
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-06 11:07
CPC Classifications
G; G11; G11B; G11B20/00; G11B20/10; G11B20/14; G11B20/1403; G11B20/1423; G11B20/1426; H; H04; H04L; H04L25/00; H04L25/38; H04L25/40; H04L25/49; H04L25/4906
Claims Analysis
Total Claims: 12
Claim 1
Independent Claim
277 words
A method of modulation and demodulation of data for converting data words of four bits of binary information to converted data words of twelve bits in which successive bits of one type are separated by at least a predetermined plurality of bits of a complementary type, comprising the steps of providing at least two consecutive data words of four bits to a logic device; detecting whether the at least two consecutive converted words of twelve bits corresponding to said two data words will, in accordance with one predetermined coding scheme, contain successive bits of said one type separated by fewer than said predetermined plurality of bits of said complementary type; providing converted data words of twelve bits according to said one predetermined coding scheme if it is detected that successive bits of said one type will be separated by at least said predetermined plurality of bits of said complementary type, and providing said converted data words according to another coding scheme if it is detected that said successive bits will be separated by less than said predetermined plurality of bits, so that the sequence of data words of twelve bits so encoded will have successive bits of said one type separated by at least said plurality of bits of said complementary type; receiving at least two consecutive ones of said converted data words of twelve bits; determining whether the received converted data words have been provided according to said one coding scheme or said other coding scheme; and demodulating said converted data words of twelve bits into data words of four bits according to the determined coding scheme for the corresponding converted data words of twelve bits.
Claim 2
Independent Claim
277 words
A method of modulation and demodulation of data for converting data words of four bits of binary information to converted data words of twelve bits in which successive bits of one type are separated by at least a predetermined plurality of bits of a complementary type, comprising the steps of providing at least two consecutive data words of four bits to a logic device; detecting whether the at least two consecutive converted words of twelve bits corresponding to said two data words will, in accordance with one predetermined coding scheme, contain successive bits of said one type separated by fewer than said predetermined plurality of bits of said complementary type; providing converted data words of twelve bits according to said one predetermined coding scheme if it is detected that successive bits of said one type will be separated by at least said predetermined plurality of bits of said complementary type, and providing said converted data words according to another coding scheme if it is detected that said successive bits will be separated by less than said predetermined plurality of bits, so that the sequence of data words of twelve bits so encoded will have successive bits of said one type separated by at least said plurality of bits of said complementary type; receiving at least two consecutive ones of said converted data words of twelve bits; determining whether the received converted data words have been provided according to said one coding scheme or said other coding scheme; and demodulating said converted data words of twelve bits into data words of four bits according to the determined coding scheme for the corresponding converted data words of twelve bits.
Claim 3
Dependent Claim
22 words
A method of modulation and demodulation according to claim 1, wherein said plurality of bits of said complementary type is five bits.
Claim 4
Dependent Claim
136 words
A method of modulation and demodulation according to claim 2, wherein said step of detecting includes detecting whether a first one of said converted data words, according to said one coding scheme, will have a bit of said one type in the last five bits thereof; and detecting whether the next successive one of said converted data words, according to said one coding scheme, will have a bit of said one type in one of the first two bits thereof so that the separation between said bits of said one type is less than five bits; and wherein said step of providing said converted data words includes providing such converted data words according to said other coding scheme if bits of said one type are so detected in said first and next successive converted data words.
Claim 5
Dependent Claim
166 words
A method of modulation and demodulation according to claim 3, wherein said other coding scheme includes a first coding routine and a second coding routine for converting said data words when it is detected that said first one of said converted data words will have a bit of said one type at one of the fourth-from-last and fifth-from-last bits thereof, and a bit of said one type within the last three bits thereof, respectively; said step of detecting further includes detecting whether the first one of said converted data words according to said one coding scheme will have a bit of said one type within the last three bits thereof and detecting whether said next successive converted data word according to said one coding scheme will have a bit of said one type within the first three bits thereof; and said step of providing said converted data words includes providing two successive converted data words according to said second coding routine in response to such detecting.
Claim 6
Dependent Claim
234 words
Apparatus for modulating data for converting data words of four bits of binary information to converted data words of twelve bits according to a predetermined coding scheme in which successive bits of one type are separated by at least a predetermined plurality of bits of a complementary type, comprising receiving means for receiving a plurality of successive data words of four bits; logic means coupled with said receiving means to determine whether a bit of said one type in a first one of said converted data words according to said predetermined coding scheme and a bit of said one type in the next successive one of said converted data words according to said predetermined coding scheme will be separated from each other by less than said predetermined plurality of bits of said complementary type; coding means for selectively providing said converted data words according to said predetermined coding scheme and according to an alternate coding scheme; and selecting means coupled to said coding means and responsive to said logic means to cause said converting means to provide said converted data words according to said predetermined coding scheme and said alternate coding scheme when said bits of one type in said converted data words according to said predetermined coding scheme are respectively determined to be separated by at least said predetermined plurality, and by less than said predetermined plurality of bits of said complementary type.
Claim 7
Dependent Claim
234 words
Apparatus for modulating data for converting data words of four bits of binary information to converted data words of twelve bits according to a predetermined coding scheme in which successive bits of one type are separated by at least a predetermined plurality of bits of a complementary type, comprising receiving means for receiving a plurality of successive data words of four bits; logic means coupled with said receiving means to determine whether a bit of said one type in a first one of said converted data words according to said predetermined coding scheme and a bit of said one type in the next successive one of said converted data words according to said predetermined coding scheme will be separated from each other by less than said predetermined plurality of bits of said complementary type; coding means for selectively providing said converted data words according to said predetermined coding scheme and according to an alternate coding scheme; and selecting means coupled to said coding means and responsive to said logic means to cause said converting means to provide said converted data words according to said predetermined coding scheme and said alternate coding scheme when said bits of one type in said converted data words according to said predetermined coding scheme are respectively determined to be separated by at least said predetermined plurality, and by less than said predetermined plurality of bits of said complementary type.
Claim 8
Dependent Claim
16 words
Apparatus for modulating according to claim 5, wherein said predetermined plurality of bits is five bits.
Claim 9
Dependent Claim
16 words
Apparatus for modulating according to claim 5, wherein said coding means includes an addressable digital memory.
Claim 10
Dependent Claim
175 words
Apparatus for demodulating data for reconverting to data words of four bits converted data words of twelve bits in which successive bits of one type are separated by at least a predetermined plurality of bits of a complementary type, and in which a predetermined coding scheme and an alternate coding scheme have been used so that bits of said one type in successive words are separated by at least said plurality of bits of said complementary type comprising: receiving means for receiving at least two successive converted data words of twelve bits; logic means for detecting whether bits of said one type occur at certain predetermined bit positions in said successive converted data words, and providing a discrimination signal in response to such detecting; means for providing a decoded first data word of four bits according to said predetermined coding scheme and a decoded second data word of four bits according to said alternate coding scheme; and selector means responsive to said discrimination signal to select one of said decoded first and second data words.
Claim 11
Dependent Claim
175 words
Apparatus for demodulating data for reconverting to data words of four bits converted data words of twelve bits in which successive bits of one type are separated by at least a predetermined plurality of bits of a complementary type, and in which a predetermined coding scheme and an alternate coding scheme have been used so that bits of said one type in successive words are separated by at least said plurality of bits of said complementary type comprising: receiving means for receiving at least two successive converted data words of twelve bits; logic means for detecting whether bits of said one type occur at certain predetermined bit positions in said successive converted data words, and providing a discrimination signal in response to such detecting; means for providing a decoded first data word of four bits according to said predetermined coding scheme and a decoded second data word of four bits according to said alternate coding scheme; and selector means responsive to said discrimination signal to select one of said decoded first and second data words.
Claim 12
Dependent Claim
50 words
Apparatus for demodulating according to claim 8, wherein said logic means is coupled to said receiving means to determine the type of bit occurring at a predetermined plurality that is less than all of the data bits for at least one of said at least two successive converted data words.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1985-11-08 | 1986-05-10 | 1986-11-09 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1989-11-08 | 1990-05-10 | 1990-11-09 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1993-11-08 | 1994-05-10 | 1994-11-09 | $7700.00 | Window Closed / Lapsed |