Patent US4590440A successfully refreshed from Google Patents.
US4590440A
Expired / Lapsed
US
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Phase locked loop with high and/or low frequency limit detectors for preventing false lock on harmonics
Assignee: AMI Semiconductor Inc
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Filing: 1984-07-06
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Granted: 1986-05-20
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Expires: 2004-07-06
Abstract
Abstract A phase locked loop circuit (16) includes means to eliminate harmonic frequency locking. The phase locked loop includes a voltage controlled oscillator (1) which provides an output signal (V out ) which is compared with the input signal (V in ) by a phase detector (4). The output signal from the phase detector is integrated and the output signal of the integrator (7) is placed on the control input lead of the voltage controlled oscillator. The output signal of the voltage controlled oscillator is provided to a frequency detector (14, 17) which determines if the output frequency is within a predefined range. If the output frequency is above the predetermined range, a limiter circuit (15) provides a low voltage output signal to the control input lead of the VCO in order to pull the input voltage of the VCO to a voltage which corresponds with the appropriate operating range of the phase locked loop. If the output frequency of voltage controlled oscillator is below the predefined frequency range, the limiter circuit provides a high voltage output signal to the control input lead of the VCO in order to pull the input voltage of the voltage controlled oscillator to a voltage which corresponds with the proper operating frequency range of the phase locked loop.
Inventors
- 👤 Yusuf A. Haque
- 👤 Ashraf K. Takla
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 11:55
CPC Classifications
H; H03; H03L; H03L7/00; H03L7/06; H03L7/08; H03L2207/00; H03L2207/14; Y; Y10; Y10S; Y10S331/00; Y10S331/02
Claims Analysis
Total Claims: 24
Claim 1
Independent Claim
249 words
A phase locked loop circuit having an input terminal for receiving an input signal and an output terminal for providing a signal in response to said input signal, comprising: phase detection means having a first input lead, a second input lead connected to said input terminal, and having an output lead; integrator means having an input lead connected to said output lead of said phase detection means, and having an output lead; a voltage controlled oscillator having a control voltage input lead connected to said output lead of said integrator means and an output lead connected to said first input lead of said phase detection means and to said output terminal; and frequency detection means for detecting when an input signal has a frequency less than or greater than a predetermined frequency range, having an input lead connected to said output lead of said voltage controlled oscillator and an output lead connected to said control voltage input lead, wherein said frequency detection means provides a signal to said voltage controlled oscillator to raise the frequency of the output signal of said voltage controlled oscillator when said frequency detection means detects that said input signal has a frequency less than said predetermined frequency range, and wherein said frequency detection means provides a signal to said voltage controlled oscillator to lower the frequency of said output signal of said voltage controlled oscillator when said frequency detection means detects that said input signal has a frequency greater than said predetermined frequency range.
Claim 2
Dependent Claim
249 words
A phase locked loop circuit having an input terminal for receiving an input signal and an output terminal for providing a signal in response to said input signal, comprising: phase detection means having a first input lead, a second input lead connected to said input terminal, and having an output lead; integrator means having an input lead connected to said output lead of said phase detection means, and having an output lead; a voltage controlled oscillator having a control voltage input lead connected to said output lead of said integrator means and an output lead connected to said first input lead of said phase detection means and to said output terminal; and frequency detection means for detecting when an input signal has a frequency less than or greater than a predetermined frequency range, having an input lead connected to said output lead of said voltage controlled oscillator and an output lead connected to said control voltage input lead, wherein said frequency detection means provides a signal to said voltage controlled oscillator to raise the frequency of the output signal of said voltage controlled oscillator when said frequency detection means detects that said input signal has a frequency less than said predetermined frequency range, and wherein said frequency detection means provides a signal to said voltage controlled oscillator to lower the frequency of said output signal of said voltage controlled oscillator when said frequency detection means detects that said input signal has a frequency greater than said predetermined frequency range.
Claim 3
Dependent Claim
18 words
A phase locked loop circuit as in claim 1 wherein said phase detection means comprises an Exclusive-OR gate.
Claim 4
Dependent Claim
89 words
A phase locked loop circuit as in claim 1 wherein said integrator means comprises: a first resistor having a first lead serving as said input lead of said integrator means, and a second lead; a second resistor having a first lead connected to said second lead of said first resistor and serving as said output lead of said integrator means, and a second lead; and a capacitor having a first lead connected to said second lead of said second resistor and a second lead connected to a reference potential.
Claim 5
Dependent Claim
21 words
A phase locked loop circuit as in claim 1 wherein said output terminal is connected to said control voltage input lead.
Claim 6
Dependent Claim
24 words
A phase locked loop circuit as in claim 1 wherein said output terminal is connected to said output lead of said voltage controlled oscillator.
Claim 7
Dependent Claim
219 words
A phase locked loop circuit as in claim 1 wherein said frequency detection means comprises a limiter circuit having an output lead serving as said output lead of said frequency detection means, said limiter circuit providing on said output lead a first potential when said frequency detection means detects that said input signal has a frequency less than said predetermined frequency range, and providing on said output lead a second potential when said frequency detection means detects that said input signal has a frequency greater than said predetermined frequency range, said limiter circuit comprising: a first switch means having a first current handling terminal connected to said first potential, and having a second current handling terminal connected to said output lead, wherein said first switch means is closed when said frequency detection means detects that said input signal has a frequency less than said predetermined frequency range thereby providing said first potential on said output lead; and a second switch means having a first current handling terminal connected to said second potential, and having a second current handling terminal connected to said output lead, wherein said second switch means is closed when said frequency detection means detects that said input signal has a frequency greater than said predetermined frequency range thereby providing said second potential on said output lead.
Claim 8
Dependent Claim
78 words
A phase locked loop circuit as in claim 1 wherein said output lead of said voltage controlled oscillator is connected to said first input lead of said phase detection means via a frequency divider wherein said frequency divider provides a signal on said first lead of said phase detection means with a frequency which is equal to the frequency of the signal provided on said output lead of said voltage controlled oscillator divided by a selected positive integer.
Claim 9
Dependent Claim
192 words
A phase locked loop circuit having an inut terminal for receiving an input signal and an output terminal for providing a signal in response to said input signal, comprising: phase detection means having a first input lead, a second input lead connected to said input terminal, and having an output lead; integrator means having an input lead connected to said output lead of said phase detection means, and having an output lead; a voltage controlled oscillator having a control voltage input lead connected to said output lead of said integrator means and an output lead connected to said first input lead of said phase detection means; frequency detection means for detecting when an input signal has a frequency greater than a predetermined frequency, having an input lead connected to said output lead of said voltage controlled oscillator and an output lead connected to said control voltage input lead, wherein said frequency detection means provides a signal to said voltage controlled oscillator to lower the frequency of said output signal of said voltage controlled oscillator when said frequency detection means detects that said input signal has a frequency greater than said predetermined frequency.
Claim 10
Dependent Claim
192 words
A phase locked loop circuit having an inut terminal for receiving an input signal and an output terminal for providing a signal in response to said input signal, comprising: phase detection means having a first input lead, a second input lead connected to said input terminal, and having an output lead; integrator means having an input lead connected to said output lead of said phase detection means, and having an output lead; a voltage controlled oscillator having a control voltage input lead connected to said output lead of said integrator means and an output lead connected to said first input lead of said phase detection means; frequency detection means for detecting when an input signal has a frequency greater than a predetermined frequency, having an input lead connected to said output lead of said voltage controlled oscillator and an output lead connected to said control voltage input lead, wherein said frequency detection means provides a signal to said voltage controlled oscillator to lower the frequency of said output signal of said voltage controlled oscillator when said frequency detection means detects that said input signal has a frequency greater than said predetermined frequency.
Claim 11
Dependent Claim
18 words
A phase locked loop circuit as in claim 8 wherein said phase detection means comprises an Exclusive-OR gate.
Claim 12
Dependent Claim
89 words
A phase locked loop circuit as in claim 8 wherein said integrator means comprises: a first resistor having a first lead serving as said input lead of said integrator means, and a second lead; a second resistor having a first lead connected to said second lead of said first resistor and serving as said output lead of said integrator means, and a second lead; and a capacitor having a first lead connected to said second lead of said second resistor and a second lead connected to a reference potential.
Claim 13
Dependent Claim
21 words
A phase locked loop circuit as in claim 8 wherein said output terminal is connected to said control voltage input lead.
Claim 14
Dependent Claim
24 words
A phase locked loop circuit as in claim 8 wherein said output terminal is connected to said output lead of said voltage controlled oscillator.
Claim 15
Dependent Claim
120 words
A phase locked loop circuit as in claim 8 wherein said frequency detection means comprises a limiter circuit having an output lead serving as said output lead of said frequency detection means, said limiter circuit providing on said output lead a selected potential when said frequency detection means detects a frequency greater than said predetermined frequency range, said limiter circuit comprising: switch means having a first current handling terminal connected to said selected potential, and having a second current handling terminal connected to said output lead, wherein said switch means is closed when said frequency detection means detects that said input signal has a frequency greater than said predetermined frequency range thereby providing said selected potential on said output lead.
Claim 16
Dependent Claim
78 words
A phase locked loop circuit as in claim 8 wherein said output lead of said voltage controlled oscillator is connected to said first input lead of said phase detection means via a frequency divider wherein said frequency divider provides a signal on said first lead of said phase detection means with a frequency which is equal to the frequency of the signal provided on said output lead of said voltage controlled oscillator divided by a selected positive integer.
Claim 17
Dependent Claim
192 words
A phase locked loop circuit having an input terminal for receiving an input signal and an output terminal for providing a signal in response to said input signal, comprising: phase detection means having a first input lead, a second input lead connected to said input terminal, and having an output lead; integrator means having an input lead connected to said output lead of said phase detection means, and having an output lead; a voltage controlled oscillator having a control voltage input lead connected to said output lead of said integrator means and an output lead connected to said first input lead of said phase detection means; frequency detection means for detecting when an input signal has a frequency less than a predetermined frequency, having an input lead connected to said output lead of said voltage controlled oscillator and an output lead connected to said control voltage input lead, wherein said frequency detection means provides a signal to said voltage controlled oscillator to raise the frequency of the output signal of said voltage controlled oscillator when said frequency detection means detects that said input signal has a frequency less than said predetermined frequency.
Claim 18
Dependent Claim
192 words
A phase locked loop circuit having an input terminal for receiving an input signal and an output terminal for providing a signal in response to said input signal, comprising: phase detection means having a first input lead, a second input lead connected to said input terminal, and having an output lead; integrator means having an input lead connected to said output lead of said phase detection means, and having an output lead; a voltage controlled oscillator having a control voltage input lead connected to said output lead of said integrator means and an output lead connected to said first input lead of said phase detection means; frequency detection means for detecting when an input signal has a frequency less than a predetermined frequency, having an input lead connected to said output lead of said voltage controlled oscillator and an output lead connected to said control voltage input lead, wherein said frequency detection means provides a signal to said voltage controlled oscillator to raise the frequency of the output signal of said voltage controlled oscillator when said frequency detection means detects that said input signal has a frequency less than said predetermined frequency.
Claim 19
Dependent Claim
18 words
A phase locked loop circuit as in claim 15 wherein said phase detection means comprises an Exclusive-OR gate.
Claim 20
Dependent Claim
89 words
A phase locked loop circuit as in claim 15 wherein said integrator means comprises: a first resistor having a first lead serving as said input lead of said integrator means, and a second lead; a second resistor having a first lead connected to said second lead of said first resistor and serving as said output lead of said integrator means, and a second lead; and a capacitor having a first lead connected to said second lead of said second resistor and a second lead connected to a reference potential.
Claim 21
Dependent Claim
21 words
A phase locked loop circuit as in claim 15 wherein said output terminal is connected to said control voltage input lead.
Claim 22
Dependent Claim
24 words
A phase locked loop circuit as in claim 15 wherein said output terminal is connected to said output lead of said voltage controlled oscillator.
Claim 23
Dependent Claim
123 words
A phase locked loop circuit as in claim 15 wherein said frequency detection means comprises a limiter circuit having an output lead serving as said output lead of said frequency detection means, said limiter circuit providing on said output lead a selected potential when said frequency detection means detect that said input signal has a frequency less than said predetermined frequency, said limiter circuit comprising: switch means having a first current handling terminal connected to said selected potential, and having a second current handling terminal connected to said output lead, wherein said switch means is closed when said frequency detection means detects that said input signal has a frequency less than said predetermined frequency, thereby providing said selected potential on said output lead.
Claim 24
Dependent Claim
78 words
A phase locked loop circuit as in claim 15 wherein said output lead of said voltage controlled oscillator is connected to said first input lead of said phase detection means via a frequency divider wherein said frequency divider provides a signal on said first lead of said phase detection means with a frequency which is equal to the frequency of the signal provided on said output lead of said voltage controlled oscillator divided by a selected positive integer.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1989-05-19 | 1989-11-18 | 1990-05-20 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1993-05-19 | 1993-11-18 | 1994-05-20 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1997-05-19 | 1997-11-18 | 1998-05-20 | $7700.00 | Window Closed / Lapsed |