US4580070A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Low power signal detector
Assignee: Samsung Electronics Co Ltd
•
Filing: 1983-03-21
•
Granted: 1986-04-01
•
Expires: 2003-03-21
Abstract
Abstract A low power signal detector circuit in which a first current limiting device supplies current or draws currents to maintain the voltage across an integrating capacitance to a selected value. A second and variable current limiting means responsive to the RF input signal amplitude is coupled to a common junction of the integrating capacitance and the first current limiting device so as to oppositely affect the charge on the capacitance as provided by the first current limiting device dependent upon the input signal value with respect to a preselected input signal voltage threshold amplitude. The first current limiting device and the variable current limiting device are conveniently implemented using metal-oxide-semiconductor-field-effect transistors operated in the weak-inversion mode so as to maintain power consumption at a minimum.
Inventors
- 👤 Dean Westman
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 15:33
CPC Classifications
G; G01; G01R; G01R19/00; G01R19/165; G01R19/16504; G01R19/16519
Claims Analysis
Total Claims: 17
Claim 1
Independent Claim
294 words
A signal detector responsive to an electromagnetic input signal comprising: first and second interconnection means adapted for electrical connection to first and second electrical power supply means, respectively; capacitance means having first and second capacitance plate regions, said second capacitance plate region being electrically connected to a selected one of said first and second interconnection means; fixed current limiting means electrically connected to said first interconnection means and having an output electrically connected to said first capacitance plate region, said fixed current limiting means capable of limiting electrical current flowing through said fixed current limiting means output to a first current limit value; variable current limiting means including, a first metal-oxide-semiconductor field-effect transistor having a gate and a channel region, said channel region having first and second terminating regions, said first terminating region electrically connected to said first capacitance plate region, reference current sourcing means electrically connected to said first interconnection means and having an output for providing a reference current therethrough, said reference current sourcing means output electrically connected to said first transistor gate region, a second metal-oxide-semiconductor field-effect transistor having a gate region and a channel region, said channel region having first and second channel terminating regions, said first terminating region electrically connected to said first and second transistor gate regions; and circuit means for providing said input signal between first and second connection means thereof, said second connection means being electrically connected to said selected one of said first and second interconnection means, and said first connection means being electrically connected to said second terminating region of one of said first and second transistors, and said second terminating region of the other of said first and second transistors being electrically connected to said interconnection means connected to said second connection means.
Claim 2
Dependent Claim
294 words
A signal detector responsive to an electromagnetic input signal comprising: first and second interconnection means adapted for electrical connection to first and second electrical power supply means, respectively; capacitance means having first and second capacitance plate regions, said second capacitance plate region being electrically connected to a selected one of said first and second interconnection means; fixed current limiting means electrically connected to said first interconnection means and having an output electrically connected to said first capacitance plate region, said fixed current limiting means capable of limiting electrical current flowing through said fixed current limiting means output to a first current limit value; variable current limiting means including, a first metal-oxide-semiconductor field-effect transistor having a gate and a channel region, said channel region having first and second terminating regions, said first terminating region electrically connected to said first capacitance plate region, reference current sourcing means electrically connected to said first interconnection means and having an output for providing a reference current therethrough, said reference current sourcing means output electrically connected to said first transistor gate region, a second metal-oxide-semiconductor field-effect transistor having a gate region and a channel region, said channel region having first and second channel terminating regions, said first terminating region electrically connected to said first and second transistor gate regions; and circuit means for providing said input signal between first and second connection means thereof, said second connection means being electrically connected to said selected one of said first and second interconnection means, and said first connection means being electrically connected to said second terminating region of one of said first and second transistors, and said second terminating region of the other of said first and second transistors being electrically connected to said interconnection means connected to said second connection means.
Claim 3
Dependent Claim
71 words
The circuit of claim 1 wherein said fixed current limiting means comprises a metal-oxide-semiconductor field-effect transistor having a gate region and channel region, said channel region having first and second terminating regions, said first terminating region providing said fixed current limiting means output, said second terminating region adapted to be electrically connected to said first interconnection means, and a gate region adapted to be electrically connected to a first reference potential.
Claim 4
Dependent Claim
75 words
The circuit of claim 1 wherein said reference current sourcing means comprises a third metal-oxide-semiconductor field-efffect transistor including a channel region having first and second channel terminating regions thereof and a gate region, said first channel terminating region providing said reference current sourcing means output, and said third transistor second terminating region being electrically connected to said first interconnection means, and said third transistor gate region being electrically connected to a first reference potential source.
Claim 5
Dependent Claim
31 words
The circuit of claim 1 wherein said circuit means includes tuned circuit means adapted to receive an electromagnetic signal in space for providing said input signal indicative of said received signal.
Claim 6
Dependent Claim
34 words
The circuit of claim 1 wherein said first field-effect transistor is operated in the weak-inversion mode and that current flowing through said first channel region is an exponential function of said input signal amplitude.
Claim 7
Dependent Claim
40 words
The circuit of claim 3 wherein said first, second and third field-effect transistors are operated in the weak-inversion mode, and current through said first field-effect transistor first terminating region is an exponential function of the amplitude of said input signal.
Claim 8
Dependent Claim
278 words
An electromagnetic signal detector circuit comprising: first and second interconnection means adapted for electrical connection to first and second electrical power supply means, respectively; first and second metal-oxide field-effect transistors each having a channel region having first and second channel terminating regions and a gate region, said second channel terminating region of said first and second transistor electrically connected to said first interconnection means, and each of said gate regions thereof adapted to be electrically connected to reference potential source for establishing a current limit value of current permitted to flow through said first and second transistor channel regions; third and fourth metal-oxide field-effect transistors each having a channel region having first and second channel terminating regions and a gate region, said gate region and said first channel terminating region of said third transistor electrically connected to said first channel terminating region of said first transistor and said fourth transistor gate region; a capacitance means having a first capacitance plate region electrically connected to said first channel terminating regions of said second and fourth transistors, and a second capacitance plate region adapted to be electrically connected to a selected one of said first and second interconnection means; and antenna means adapted to receive electromagnetic signals from space and provide an antenna signal between first and second terminal means thereof, said second terminal means being electrically connected to said second interconection means, and said first terminal means being electrically connected to a selected one of said second channel terminating regions of said third and fourth transistors, and said second channel terminating region of the other of said third and fourth transistors being electrically connected to said second interconnecting means.
Claim 9
Dependent Claim
278 words
An electromagnetic signal detector circuit comprising: first and second interconnection means adapted for electrical connection to first and second electrical power supply means, respectively; first and second metal-oxide field-effect transistors each having a channel region having first and second channel terminating regions and a gate region, said second channel terminating region of said first and second transistor electrically connected to said first interconnection means, and each of said gate regions thereof adapted to be electrically connected to reference potential source for establishing a current limit value of current permitted to flow through said first and second transistor channel regions; third and fourth metal-oxide field-effect transistors each having a channel region having first and second channel terminating regions and a gate region, said gate region and said first channel terminating region of said third transistor electrically connected to said first channel terminating region of said first transistor and said fourth transistor gate region; a capacitance means having a first capacitance plate region electrically connected to said first channel terminating regions of said second and fourth transistors, and a second capacitance plate region adapted to be electrically connected to a selected one of said first and second interconnection means; and antenna means adapted to receive electromagnetic signals from space and provide an antenna signal between first and second terminal means thereof, said second terminal means being electrically connected to said second interconection means, and said first terminal means being electrically connected to a selected one of said second channel terminating regions of said third and fourth transistors, and said second channel terminating region of the other of said third and fourth transistors being electrically connected to said second interconnecting means.
Claim 10
Dependent Claim
32 words
The circuit of claim 7 wherein said reference potential source is selected to have a value such that said first, second, third and fourth field-effect transistors are operated in the weak-inversion mode.
Claim 11
Dependent Claim
50 words
The circuit of claim 7 wherein: said fourth transistor second terminating region is electrically connected to said second interconnection means; and said antenna means includes an induction loop having one end electrically connected to said first terminal means, and the other end thereof electrically connected to said second terminal means.
Claim 12
Dependent Claim
77 words
The circuit of claim 7 wherein said first, second, third, and fourth channel regions of each transistor have a selected channel width and length such that an effective current may pass through said capacitance means in a first direction if the amplitude of said antenna signal is above a preselected threshold value determined, in part, by said first current limit value, and in a second direction if said antenna signal amplitude is below said preselected threshold value.
Claim 13
Dependent Claim
277 words
An electromagnetic signal detector circuit comprising: the first and second interconnection means adapted for electrical connection to first and second electrical power supply means, respectively; capacitance means having first and second capacitance plate regions, said second capacitance plate region being electrically connected to a selected one of said first and second interconnection means; circuit means having first and second terminal means, said circuit means including antenna means adapted to receive an electromagnetic signal in space for providing an output signal between said first and second terminal means, said second terminal means being electrically connected to said selected one of said first and second interconnection means; fixed current limiting means electrically connected to said the other of said first and second interconnection means and having an output electrically connected to said first capacitance plate region, said fixed current limiting means capable of limiting electrical current flowing through said fixed current limiting means output to a first current limit value; and variable current limiting means electrically connected in said circuit and having an output electrically connected to said first capacitance plate region and having an input electrically connected to said first terminal means for receiving said circuit means output signal, said variable current limiting means capable of limiting current through said variable current limiting means output to a current limit value which is a function of said electromagnetic signal such that current will pass through said capacitance means in a first direction if the amplitude of said electromagnetic signal is above a selected threshold value substantially determined by said first current limit value and in a second direction if said electromagnetic signal amplitude is below said selected threshold value.
Claim 14
Dependent Claim
277 words
An electromagnetic signal detector circuit comprising: the first and second interconnection means adapted for electrical connection to first and second electrical power supply means, respectively; capacitance means having first and second capacitance plate regions, said second capacitance plate region being electrically connected to a selected one of said first and second interconnection means; circuit means having first and second terminal means, said circuit means including antenna means adapted to receive an electromagnetic signal in space for providing an output signal between said first and second terminal means, said second terminal means being electrically connected to said selected one of said first and second interconnection means; fixed current limiting means electrically connected to said the other of said first and second interconnection means and having an output electrically connected to said first capacitance plate region, said fixed current limiting means capable of limiting electrical current flowing through said fixed current limiting means output to a first current limit value; and variable current limiting means electrically connected in said circuit and having an output electrically connected to said first capacitance plate region and having an input electrically connected to said first terminal means for receiving said circuit means output signal, said variable current limiting means capable of limiting current through said variable current limiting means output to a current limit value which is a function of said electromagnetic signal such that current will pass through said capacitance means in a first direction if the amplitude of said electromagnetic signal is above a selected threshold value substantially determined by said first current limit value and in a second direction if said electromagnetic signal amplitude is below said selected threshold value.
Claim 15
Dependent Claim
29 words
The circuit of claim 11 wherein said antenna means comprises an inductance means, adapted to receive electromagnetic signals in space, electrically connected between said first and second terminal means.
Claim 16
Dependent Claim
268 words
An electromagnetic signal detector circuit comprising: first and second interconnection means adapted for electrical connection to first and second electrical power supply means, respectively; first and second metal-oxide field-effect transistors each having a channel region having first and second channel terminating regions and a gate region, said second channel terminating region of said first transistor electrically connected to said first interconnection means, and each of said gate regions thereof adapted to be electrically connected to reference potential source for establishing a current limit value of current permitted to flow through said first and second transistor channel regions; third and fourth metal-oxide field-effect transistors each having a channel region having first and second channel terminating regions and a gate region, said gate region and said first channel terminating region of said third transistor electrically connected to said first channel terminating region of said first transistor and said fourth transistor gate region, and said second channel terminating regions of each of said third and fourth transistor electrically connected to said second interconnection means; a capacitance means having a first capacitance plate region electrically connected to said first channel terminating regions of said second and fourth transistors, and a second capacitance plate region adapted to be electrically connected to a selected one of said first and second interconnection means; and antenna means adapted to receive electromagnetic signals from space and provide an antenna signal between first and second terminal means thereof, said second terminal means being electrically connected to said first interconection means, and said first terminal means being electrically connected to said second channel terminating region of said second transistor.
Claim 17
Dependent Claim
268 words
An electromagnetic signal detector circuit comprising: first and second interconnection means adapted for electrical connection to first and second electrical power supply means, respectively; first and second metal-oxide field-effect transistors each having a channel region having first and second channel terminating regions and a gate region, said second channel terminating region of said first transistor electrically connected to said first interconnection means, and each of said gate regions thereof adapted to be electrically connected to reference potential source for establishing a current limit value of current permitted to flow through said first and second transistor channel regions; third and fourth metal-oxide field-effect transistors each having a channel region having first and second channel terminating regions and a gate region, said gate region and said first channel terminating region of said third transistor electrically connected to said first channel terminating region of said first transistor and said fourth transistor gate region, and said second channel terminating regions of each of said third and fourth transistor electrically connected to said second interconnection means; a capacitance means having a first capacitance plate region electrically connected to said first channel terminating regions of said second and fourth transistors, and a second capacitance plate region adapted to be electrically connected to a selected one of said first and second interconnection means; and antenna means adapted to receive electromagnetic signals from space and provide an antenna signal between first and second terminal means thereof, said second terminal means being electrically connected to said first interconection means, and said first terminal means being electrically connected to said second channel terminating region of said second transistor.
References Cited (Backward Citations)
US3656000A
Cited
US3631528A
Cited
US3912948A
Cited
US3775693A
Cited
US3932773A
Cited
US3805095A
Cited
US3898479A
Cited
US3976984A
Cited
US4256976A
Cited
US4342928A
Cited
US4321561A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1989-03-31 | 1989-09-30 | 1990-04-01 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1993-03-31 | 1993-09-30 | 1994-04-01 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1997-03-31 | 1997-09-30 | 1998-04-01 | $7700.00 | Window Closed / Lapsed |