US4560582A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method of preparing a semiconductor device
Assignee: Suwa Seikosha KK
•
Filing: 1984-06-07
•
Granted: 1985-12-24
•
Expires: 2004-06-07
Abstract
Abstract A semiconductor device including a MOS field effect transistor formed on a single silicon crystal substrate having source and drain diffused regions of reduced depth. In order to avoid penetration of aluminum from the aluminum connector through the diffused region into the substrate, the diffused region is formed by double diffusion of at least two types of impurities of the same conductive type, but having different diffusion coefficients with respect to each other.
Inventors
- 👤 Matsuo Ichikawa
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-31 22:27
CPC Classifications
H; H10; H10D; H10D62/00; H10D62/10; H10D62/13; H10D62/149; H10D62/151; H10D30/00; H10D30/60; H10P; H10P32/00; Y; Y10; Y10S; Y10S257/00; Y10S257/919
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
201 words
A method for forming a semiconductor device including an MOS field effect transistor on a single crystal silicon substrate, comprising the steps of: forming a field oxide film on a single crystal silicon substrate with a region free of the field oxide film; forming a gate oxide film on the region of the substrate free of the field oxide film; depositing a gate electrode on a portion of the gate oxide film spaced apart from the field oxide film; forming a thin oxide film on the gate electrode and the region between the gate and field oxide film; diffusing ions into the surface of the substrate at the region between the gate and the field oxide film for forming a first N + diffused source and/or drain regions; forming a contact hole in the thin oxide film in the opening; depositing a second insulating film on the surface of the thin oxide film and field oxide film; diffusing a second atom into the surface of the substrate at the contact hole for forming a second diffused region overlapping the first diffused region and to a greater depth than the first diffused region; and forming a metal connector at the contact hole.
Claim 2
Independent Claim
201 words
A method for forming a semiconductor device including an MOS field effect transistor on a single crystal silicon substrate, comprising the steps of: forming a field oxide film on a single crystal silicon substrate with a region free of the field oxide film; forming a gate oxide film on the region of the substrate free of the field oxide film; depositing a gate electrode on a portion of the gate oxide film spaced apart from the field oxide film; forming a thin oxide film on the gate electrode and the region between the gate and field oxide film; diffusing ions into the surface of the substrate at the region between the gate and the field oxide film for forming a first N + diffused source and/or drain regions; forming a contact hole in the thin oxide film in the opening; depositing a second insulating film on the surface of the thin oxide film and field oxide film; diffusing a second atom into the surface of the substrate at the contact hole for forming a second diffused region overlapping the first diffused region and to a greater depth than the first diffused region; and forming a metal connector at the contact hole.
Claim 3
Dependent Claim
39 words
The process of claim 1, wherein the substrate is a p-type single silicon cyrstal substrate and the second N + diffused region is formed of atoms having a larger diffusion coefficient than the atom of the first diffused retion.
Claim 4
Dependent Claim
29 words
The process of claim 2, wherein the atoms of the first N + diffused region are As and the atoms of the second N + diffusion region are P.
Claim 5
Dependent Claim
29 words
The process of claim 2, wherein the atoms of the first N + diffused region are B and the atoms of the second N + diffused region are P.
Claim 6
Independent Claim
197 words
A method for forming a semiconductor device including an MOS field effect transistor on a single crystal silicon substrate, comprising: forming a field oxide film on a portion of a single crystal silicon substrate with a region free of field oxide film; forming a gate oxide film on the substrate free of the field oxide film; depositing the gate electrode on a portion of the gate oxide film spaced apart from the field oxide film; forming a thin oxide film on the gate electrode and the region between the gate and field oxide film; diffusing As ions into the surface of the substrate at the region between the gate and the field oxide film for forming a first N + diffused source and drain regions; forming a contact hole in a portion of the thin oxide film in the opening at the diffused source and drain regions; diffusing P atoms into the surface of the substrate at the contact openings at the source and drain regions for forming a second diffused region overlapping the first As diffused region and to a greater depth than the As diffused region; and forming a metal conductor at the contact holes.
Claim 7
Independent Claim
197 words
A method for forming a semiconductor device including an MOS field effect transistor on a single crystal silicon substrate, comprising: forming a field oxide film on a portion of a single crystal silicon substrate with a region free of field oxide film; forming a gate oxide film on the substrate free of the field oxide film; depositing the gate electrode on a portion of the gate oxide film spaced apart from the field oxide film; forming a thin oxide film on the gate electrode and the region between the gate and field oxide film; diffusing As ions into the surface of the substrate at the region between the gate and the field oxide film for forming a first N + diffused source and drain regions; forming a contact hole in a portion of the thin oxide film in the opening at the diffused source and drain regions; diffusing P atoms into the surface of the substrate at the contact openings at the source and drain regions for forming a second diffused region overlapping the first As diffused region and to a greater depth than the As diffused region; and forming a metal conductor at the contact holes.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1988-12-23 | 1989-06-24 | 1989-12-24 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1992-12-23 | 1993-06-24 | 1993-12-24 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1996-12-23 | 1997-06-24 | 1997-12-24 | $7700.00 | Window Closed / Lapsed |