Etching windows in thick dielectric coatings overlying semiconductor device surfaces

Claim 2

In a method of opening a contact window in a relatively thick glass coating on a semiconductor wafer surface over a semiconductor device region having a previously formed adjacent electrode, the improvement which includes depositing a thin silicon nitride coating over the device region and adjacent electrode before depositing the glass coating, opening a first window in the silicon nitride coating precisely registered for an intended electrical contact at least to said region, depositing said thick glass coating onto said silicon nitride coating, and then preferentially etching the glass coating to open a second contact window over the first contact window, whereby unintended lateral etching of said second window can occur without producing an unintended electrical contact to said previously formed electrode.

Claim 3

In a method of forming an electrical contact to a field effect transistor region through a thick glass coating which also covers an adjacent gate electrode for said transistor, the improvement which includes depositing a precisely etchable dielectric coating over the region and gate electrode before applying the glass coating, opening a first window in said precisely etchable dielectric layer over said region but not said gate electrode, applying the glass coating onto the precisely etchable dielectric coating over the region and gate electrode, opening a second window in the glass coating over the first window by means to which said another dielectric layer is substantially inert and effective to maintain an electrically insulating coating over said gate electrode even if the second window overlaps it, depositing a blanket metal coating onto said glass over said region and gate electrode, and then defining an electrical contact for said region, whereby the electrical contact can overlap the gate electrode without also electrically contacting it.

Claim 4

In a method of forming an electrical contact to a field effect transistor region through a thick glass coating which also covers an adjacent gate electrode for said transistor, the improvement which includes depositing a precisely etchable dielectric coating over the region and gate electrode before applying the glass coating, opening a first window in said precisely etchable dielectric layer over said region but not said gate electrode, applying the glass coating onto the precisely etchable dielectric coating over the region and gate electrode, opening a second window in the glass coating over the first window by means to which said another dielectric layer is substantially inert and effective to maintain an electrically insulating coating over said gate electrode even if the second window overlaps it, depositing a blanket metal coating onto said glass over said region and gate electrode, and then defining an electrical contact for said region, whereby the electrical contact can overlap the gate electrode without also electrically contacting it.

Claim 5

In a method of making discrete electrical contacts to the drain regions of a plurality of field effect transistors in an integrated circuit on a silicon slice through a relatively thick and reflowable glass layer without also inadvertently electrically contacting gate electrode portions contiguous those drain regions, the improvement which includes depositing a silicon nitride blanket layer on the slice after forming the gate electrodes and a thin silicon dioxide layer over said regions, opening discrete contact windows in the silicon nitride layer precisely registered over said drain regions with an etchant that does not significantly attack silicon dioxide, depositing a relatively thick blanket layer of reflowable glass onto said silicon nitride layer, etching contact windows in the glass layer with an etchant that also etches silicon dioxide but does not significantly attack silicon nitride, whereby portions of said regions are exposed but no gate electrode portion is inadvertently exposed even if the glass layer inadvertently overlaps it, and then forming on the glass layer a metallization pattern which contacts said drain regions through said windows but which is substantially protected from unintended electrical contact with said gate electrodes by said silicon nitride coating.

Claim 6

In a method of making discrete electrical contacts to the drain regions of a plurality of field effect transistors in an integrated circuit on a silicon slice through a relatively thick and reflowable glass layer without also inadvertently electrically contacting gate electrode portions contiguous those drain regions, the improvement which includes depositing a silicon nitride blanket layer on the slice after forming the gate electrodes and a thin silicon dioxide layer over said regions, opening discrete contact windows in the silicon nitride layer precisely registered over said drain regions with an etchant that does not significantly attack silicon dioxide, depositing a relatively thick blanket layer of reflowable glass onto said silicon nitride layer, etching contact windows in the glass layer with an etchant that also etches silicon dioxide but does not significantly attack silicon nitride, whereby portions of said regions are exposed but no gate electrode portion is inadvertently exposed even if the glass layer inadvertently overlaps it, and then forming on the glass layer a metallization pattern which contacts said drain regions through said windows but which is substantially protected from unintended electrical contact with said gate electrodes by said silicon nitride coating.