Circuit for converting two balanced ECL level signals into an inverted TTL level signal

Claim 2

A circuit for receiving, at first and second input terminals respectively, a first input logical signal having one of two possible negative potential levels, relative to a ground reference potential level, and a second input logical signal having the other of the two possible negative potential levels, and converting said input logical signals into a logical output signal, having one of two possible positive potential levels, at an output terminal, said circuit comprising: a switch device defining two current paths which are connectable to a reference potential level that is more negative than either of said two possible negative potential levels, said switch device having a first condition, in which one current path is open and the other is closed, and a second condition, in which said one current path is closed and said other path is open, and being in said first condition when the first input terminal is at the more negative of said two possible negative potential levels and in said second condition when the second input terminal is at the more negative of said two possible negative potential levels; a first transistor having its base connected to said one current path, the emitter of said first transistor being connectable to a reference potential level that is more positive than either of said two possible positive potential levels; a first resistor connected between the base and the emitter of said first transistor; a first diode connected between the base and the collector of said first transistor; a second transistor having its base connected to said other current path and its emitter connected to said output terminal and to the collector of said first transistor, the collector of said second transistor being connectable to a reference potential level intermediate the less negative of the two possible negative potential levels and the less positive of the two possible positive potential levels; a second resistor connected between the base of said second transistor and the collector of said first transistor; and a second diode having one terminal connected to the base of said second transistor and having its other terminal connectable to a reference potential level intermediate the less negative of the two possible negative potentials levels and the less positive of the two possible positive potential levels.

Claim 3

A circuit according to claim 1, wherein said diodes are variable capacitance diodes.

Claim 4

A circuit according to claim 1, wherein said diodes are Schottky barrier diodes.

Claim 5

A circuit according to claim 1, wherein said switch device comprises a pair of transistors providing the two current paths respectively, one transistor of the pair having its base connected to said first input terminal and its collector connected to the base of said first transistor, and the other transistor of the pair having its base connected to said second input terminal and its collector connected to the base of said second transistor, the emitters of the pair of transistors being connected to one end of a third resistor which is connectable at its other end to the negative reference potential level.

Claim 6

A circuit according to claim 1, wherein the collector of the second transistor is connected to said other terminal of the second diode.

Claim 7

A circuit for receiving, at first and second input terminals respectively, a first input logical input signal having one of two possible potential levels of one polarity and a second input logical signal having the other of the two possible potential levels of said one polarity, and converting said input logical signals into a logical output signal, having one of two possible potential levels of the opposite polarity, at an output terminal, said circuit comprising: a switch device defining two current paths which are connectable to a reference potential level of said one polarity and having a greater absolute value than either of said two possible potential levels of said one polarity, said switch device having a first condition, in which one current path is open and the other is closed, and a second condition, in which one current path is closed and said other path is open, and being in said first condition when the first input terminal is at that possible potential level of said one polarity which has the greater absolute value and in said second condition when the second input terminal is at that possible potential level of said one polarity which has the greater absolute value; a first transistor having its base connected to said one current path and its collector connected to said output terminal, the emitter of said first transistor being connectable to a reference potential level of said opposite polarity and having an absolute value greater than the absolute value of either of said two possible potential levels of said opposite polarity; a first resistor connected between the base and the emitter of said first transistor; a first diode connected between the base and the collector of said first transistor; a second transistor having its base connected to said other current path and its emitter connected to said output terminal and to the collector of the first transistor, the collector of the second transistor being connectable to a reference potential level intermediate that one of the two possible potential levels of said one polarity which has the lesser absolute value and that one of said two possible potential levels of the opposite polarity which has the lesser absolute value; a second resistor connected between the base of said second transistor and the collector of said first transistor; and a second diode having one terminal connected to the base of said second transistor having its other terminal connectable to a reference potential level intermediate said one potential level of said one polarity and said one potential level of said opposite polarity.

Claim 8

A circuit for receiving, at first and second input terminals respectively, a first input logical input signal having one of two possible potential levels of one polarity and a second input logical signal having the other of the two possible potential levels of said one polarity, and converting said input logical signals into a logical output signal, having one of two possible potential levels of the opposite polarity, at an output terminal, said circuit comprising: a switch device defining two current paths which are connectable to a reference potential level of said one polarity and having a greater absolute value than either of said two possible potential levels of said one polarity, said switch device having a first condition, in which one current path is open and the other is closed, and a second condition, in which one current path is closed and said other path is open, and being in said first condition when the first input terminal is at that possible potential level of said one polarity which has the greater absolute value and in said second condition when the second input terminal is at that possible potential level of said one polarity which has the greater absolute value; a first transistor having its base connected to said one current path and its collector connected to said output terminal, the emitter of said first transistor being connectable to a reference potential level of said opposite polarity and having an absolute value greater than the absolute value of either of said two possible potential levels of said opposite polarity; a first resistor connected between the base and the emitter of said first transistor; a first diode connected between the base and the collector of said first transistor; a second transistor having its base connected to said other current path and its emitter connected to said output terminal and to the collector of the first transistor, the collector of the second transistor being connectable to a reference potential level intermediate that one of the two possible potential levels of said one polarity which has the lesser absolute value and that one of said two possible potential levels of the opposite polarity which has the lesser absolute value; a second resistor connected between the base of said second transistor and the collector of said first transistor; and a second diode having one terminal connected to the base of said second transistor having its other terminal connectable to a reference potential level intermediate said one potential level of said one polarity and said one potential level of said opposite polarity.

Claim 9

A circuit according to claim 6, wherein said first and second transistors are PNP transistors.

Claim 10

A circuit according to claim 6, wherein said diodes are variable capacitance diodes.

Claim 11

A circuit according to claim 6, wherein said diodes are Schottky barrier diodes.

Claim 12

A circuit according to claim 6, wherein said switch device comprises a pair of transistors providing the two current paths respectively, one transistor of the pair having its base connected to said first input terminal and having its collector connected to the base of said first transistor, and the other transistor of the pair having its base connected to said second input terminal and its collector connected to the base of said second transistor, the emitters of the pair of transistors being connected to one end of a third resistor which is connectable at its other end to the reference potential level of said one polarity.

Claim 13

A circuit according to claim 10, wherein said one polarity is negative relative to a ground potential level and said opposite polarity is positive relative to said ground potential level, and wherein said first and second transistors are PNP transistors and the transistors of said pair are NPN transistors.

Claim 14

A circuit according to claim 5, wherein said second diode is connected between the collector and the base of said second transistor.