US3909637A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Cross-coupled capacitor for AC performance tuning
Assignee: International Business Machines Corp
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Filing: 1974-11-21
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Granted: 1975-09-30
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Expires: 1994-11-21
Abstract
Abstract A method and apparatus for increasing the delays in transitions at controlled terminals in a non-linear integrated circuit by increasing the effective capacitance at the controlled terminals. This can be accomplished by capacitively cross-coupling at opposing phase controlled terminals. The capacitive crosscoupling is effected by connecting two P/N junction diodes in series with opposite directions of conductivity such that the capacitances across the junctions of the diodes are effectively connected in series.
Inventors
- 👤 Jack A Dorler
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-28 03:33
CPC Classifications
H; H03; H03K; H03K5/00; H03K5/01; H03K5/12; H03K6/00; H03K6/04; H03K2005/00013; H03K2005/00019; H03K2005/00026; H03K2005/00045; H03K2005/0015; H03K2005/00163; H03K2005/0028
Claims Analysis
Total Claims: 2
Claim 1
Independent Claim
213 words
A non-linear integrated circuit comprising at least one current switch having one input and two output terminals and producing opposite phase output signals on said two output terminals in response to a single polarity input signal at said input terminal, a first emitter follower having a base electrode connected to one of said two output terminals, a second emitter follower having its base electrode connected to the other of said two output terminals, capacitance means for delaying the transitions of said opposite phase output signals connected directly between said base electrodes of said first and second emitter followers, said capacitance means consisting of first and second voltage variable P/N junction capacitors connected in series with opposite directions of conductivity, said direct connection between said base electrodes of said series connected first and second voltage variable P/N junction capacitors producing a large dv/dt across said capacitance means due to said output signals being opposite in phase resulting in the effective capacitance seen by each of said output terminals being substantially greater than the capacitances of said first and second voltage variable P/N junction capacitors, and the capacitance of said capacitance means being substantially independent of voltage due to said first and second voltage variable P/N junction capacitors being connected with opposite directions of conductivity.
Claim 2
Dependent Claim
213 words
A non-linear integrated circuit comprising at least one current switch having one input and two output terminals and producing opposite phase output signals on said two output terminals in response to a single polarity input signal at said input terminal, a first emitter follower having a base electrode connected to one of said two output terminals, a second emitter follower having its base electrode connected to the other of said two output terminals, capacitance means for delaying the transitions of said opposite phase output signals connected directly between said base electrodes of said first and second emitter followers, said capacitance means consisting of first and second voltage variable P/N junction capacitors connected in series with opposite directions of conductivity, said direct connection between said base electrodes of said series connected first and second voltage variable P/N junction capacitors producing a large dv/dt across said capacitance means due to said output signals being opposite in phase resulting in the effective capacitance seen by each of said output terminals being substantially greater than the capacitances of said first and second voltage variable P/N junction capacitors, and the capacitance of said capacitance means being substantially independent of voltage due to said first and second voltage variable P/N junction capacitors being connected with opposite directions of conductivity.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1978-09-29 | 1979-03-31 | 1979-09-30 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1982-09-29 | 1983-03-31 | 1983-09-30 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1986-09-29 | 1987-03-31 | 1987-09-30 | $7700.00 | Window Closed / Lapsed |