US4533992A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Microcomputer having shifter in ALU input
Assignee: Texas Instruments Inc
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Filing: 1982-02-22
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Granted: 1985-08-06
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Expires: 2002-02-22
Abstract
Abstract A system for real-time digital signal processing employs a single-chip microcomputer device having separate on-chip program ROM and data RAM, with separate address and data paths for program and data. An external program address bus allows off-chip program fetch in an expansion mode, with the opcode returned by an external data bus. A bus interchange module allows transfer between the separate internal program and data busses in special circumstances. The internal busses are 16-bit, while the ALU and accumulator are 32-bit. A multiplier circuit produces a single state 16×16 multiply function separate from the ALU, with 32-bit output to the ALU. One input to the ALU passes through a 0-to-15 bit shifter with sign extension.
Inventors
- 👤 Surendar S. Magar
- 👤 Edward R. Caudel
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-28 20:13
CPC Classifications
G; G06; G06F; G06F5/00; G06F5/01; G06F5/015
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
166 words
A microcomputer device constructed in a single integrated circuit comprising: (a) an arithmetic/logic unit having at least one data input of 2N bits and a data output of 2N bits, where N is an integer, (b) data bus means of N bits in width, (c) shifter means connecting the data bus means to said one data input of the arithmetic/logic unit; the shifter means having an N-bit input coupled to said data bus means and a 2N-bit output coupled to said one data input of the arithmetic/logic unit; the shifter means selectively shifting a data word received at said N-bit input from zero bits up to N-1 bits and applying the shifted data word to said one data input of the arithmetic/logic unit, said shifter means extending the most significant bit of the data word to fill all bits between said most significant bit of the shifted data word and the most significant of said 2N bits of said one data input of the arithmetic/logic unit.
Claim 2
Dependent Claim
166 words
A microcomputer device constructed in a single integrated circuit comprising: (a) an arithmetic/logic unit having at least one data input of 2N bits and a data output of 2N bits, where N is an integer, (b) data bus means of N bits in width, (c) shifter means connecting the data bus means to said one data input of the arithmetic/logic unit; the shifter means having an N-bit input coupled to said data bus means and a 2N-bit output coupled to said one data input of the arithmetic/logic unit; the shifter means selectively shifting a data word received at said N-bit input from zero bits up to N-1 bits and applying the shifted data word to said one data input of the arithmetic/logic unit, said shifter means extending the most significant bit of the data word to fill all bits between said most significant bit of the shifted data word and the most significant of said 2N bits of said one data input of the arithmetic/logic unit.
Claim 3
Dependent Claim
17 words
A device according to claim 1 wherein the arithmetic/logic unit performs operation on data in two's complement.
Claim 4
Dependent Claim
15 words
A device according to claim 2 wherein said most significant bit is a sign bit.
Claim 5
Dependent Claim
42 words
A device according to claim 1 including a 2N-bit register, and wherein the arithmetic/logic unit has a second 2N bit data input, and means for alternatively coupling either said 2N-bit register or the output of said shifter to said one data input.
Claim 6
Dependent Claim
43 words
A device according to claim 4 wherein a 2N bit accumulator is connected to receive the data output of the arithmetic/logic unit, and also said second 2N bit data input of the arithmetic/logic unit is connected to receive the contents of said accumulator.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1988-08-05 | 1989-02-04 | 1989-08-06 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1992-08-05 | 1993-02-04 | 1993-08-06 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1996-08-05 | 1997-02-04 | 1997-08-06 | $7700.00 | Window Closed / Lapsed |