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US4528648A
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Memory management system
Assignee: Unisys Corp
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Filing: 1982-07-21
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Granted: 1985-07-09
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Expires: 2002-07-21
Abstract
Abstract A unique memory management system for use with a memory device which is common (or shared) with a plurality of user elements utilizing a memory address counter, scratch pad address memory, external memory address inputs and an address multiplexer.
Inventors
- 👤 Eugene K. Lew
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-26 20:45
CPC Classifications
G; G06; G06F; G06F12/00; G06F12/02; G06F12/04
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
138 words
A shared memory system comprising, storage memory means (14), scratch pad memory means (11), memory address means (13) connected to supply an address signal to said storage memory means to access the contents thereof and to concurrently supply said address signal to said scratch pad memory means thereby to store said address signal therein, multiplexer means (12) connected to supply signals to said memory address means thereby to provide said address signal, said scratch pad memory means connected to supply address signals to said multiplexer means which are selectively supplied to said memory address means, source means (16) connected to said multiplexer means to selectively supply address signals to said memory address means via said multiplexer means, and address register means (10) connected to the input of said scratch pad memory means to supply further address signals thereto.
Claim 2
Dependent Claim
138 words
A shared memory system comprising, storage memory means (14), scratch pad memory means (11), memory address means (13) connected to supply an address signal to said storage memory means to access the contents thereof and to concurrently supply said address signal to said scratch pad memory means thereby to store said address signal therein, multiplexer means (12) connected to supply signals to said memory address means thereby to provide said address signal, said scratch pad memory means connected to supply address signals to said multiplexer means which are selectively supplied to said memory address means, source means (16) connected to said multiplexer means to selectively supply address signals to said memory address means via said multiplexer means, and address register means (10) connected to the input of said scratch pad memory means to supply further address signals thereto.
Claim 3
Dependent Claim
31 words
The system recited in claim 1 including, control means for supplying control signals to said multiplexer means to control the signals which are to be supplied to said memory address means.
Claim 4
Dependent Claim
32 words
The system recited in claim 1 wherein, said memory address means comprises counter means for providing sequential memory address signals to said storage memory means and to said scratch pad memory means.
Claim 5
Dependent Claim
22 words
The memory system recited in claim 3 including, clock source means connected to said memory address means to supply synchronizing signals thereto.
Claim 6
Dependent Claim
26 words
The system recited in claim 4 wherein, said memory address means includes counter means which is incremented or decremented by the application of said synchronizing signals.
References Cited (Backward Citations)
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1988-07-08 | 1989-01-07 | 1989-07-09 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1992-07-08 | 1993-01-07 | 1993-07-09 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1996-07-08 | 1997-01-07 | 1997-07-09 | $7700.00 | Window Closed / Lapsed |