Patent US4512816A successfully refreshed from Google Patents.
US4512816A
Expired / Lapsed
US
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High-density IC isolation technique capacitors
Assignee: National Semiconductor Corp
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Filing: 1984-04-23
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Granted: 1985-04-23
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Expires: 2004-04-23
Abstract
Abstract A semiconductor substrate having an epitaxial layer on its upper surface is provided with a masking layer. Holes are photolithographically etched in the masking layer where isolation diffusion regions are to be formed. Then aluminum ions are implanted into the surface and diffused completely through the epitaxial layer so as to create tubs of epitaxial material that are PN junction isolated. Since aluminum is a fast diffuser, the diffusion time is greatly reduced, thereby reducing the up diffusion of buried N+ collector so that the original epitaxial layer can be made relatively thin. Lateral isolation diffusion is reduced, thereby substantially reducing the surface area required for isolation. Thus, the process is capable of increasing the component density in the completed integrated circuit.
Inventors
- 👤 Amolak R. Ramde
- 👤 Wadie N. Khadder
- 👤 Surinder Krishna
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-06 13:34
CPC Classifications
H; H10; H10P; H10P30/00; H10P30/20; H10P30/21; H10P30/202; H10P30/204; H10P32/00; H10P32/10; H10P32/14; H10P32/1404; H10P32/1406; H10P32/17; H10P32/171; H10W; H10W10/00; H10W10/01; H10W10/031; H10W10/30
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
160 words
In the process for creating an isolation diffusion in a monolithic integrated semiconductor device which includes active transistors that have emitter, base and collector regions, wherein a thin epitaxial layer of semiconductor is deposited upon an opposite conductivity type semiconductor substrate and employing a slow diffusing impurity type buried layer, the steps comprising: forming a masking oxide layer over said epitaxial layer; removing said masking oxide in those areas where isolation diffusion is desired and in those areas where transistor bases are desired whereby said transistor bases are automatically aligned with respect to said isolation; temporarily masking the areas in which transistor bases are desired; ion implanting a fast diffusing impurity species into said thin epitaxial layer in said areas of isolation diffusion; and heating said semiconductor to diffuse said fast diffusing impurity completely through said epitaxial layer whereby the penetration of said buried layer into said epitaxial layer is minimized permitting a reduced thickness epitaxial layer to about 9μ.
Claim 2
Dependent Claim
160 words
In the process for creating an isolation diffusion in a monolithic integrated semiconductor device which includes active transistors that have emitter, base and collector regions, wherein a thin epitaxial layer of semiconductor is deposited upon an opposite conductivity type semiconductor substrate and employing a slow diffusing impurity type buried layer, the steps comprising: forming a masking oxide layer over said epitaxial layer; removing said masking oxide in those areas where isolation diffusion is desired and in those areas where transistor bases are desired whereby said transistor bases are automatically aligned with respect to said isolation; temporarily masking the areas in which transistor bases are desired; ion implanting a fast diffusing impurity species into said thin epitaxial layer in said areas of isolation diffusion; and heating said semiconductor to diffuse said fast diffusing impurity completely through said epitaxial layer whereby the penetration of said buried layer into said epitaxial layer is minimized permitting a reduced thickness epitaxial layer to about 9μ.
Claim 3
Dependent Claim
24 words
The process of claim 1 wherein said epitaxial layer is N-type silicon, said substrate is P-type silicon and said fast diffusing impurity is aluminum.
Claim 4
Dependent Claim
18 words
The process of claim 1 wherein said ion implantation is achieved through a thin layer of silicon oxide.
Claim 5
Dependent Claim
29 words
The process of claim 2 wherein most of the diffusion of said fast diffusing impurity occurs during the formation of said transistor base regions in said integrated semiconductor device.
Claim 6
Dependent Claim
35 words
The process of claim 4 wherein the formation of said transistor bases is performed so that the transistor base impurities are simultaneously deposited in said areas of isolation diffusion thereby to increase the conductivity thereof.
References Cited (Backward Citations)
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1988-04-22 | 1988-10-22 | 1989-04-23 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1992-04-22 | 1992-10-22 | 1993-04-23 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1996-04-22 | 1996-10-22 | 1997-04-23 | $7700.00 | Window Closed / Lapsed |