Patent US4498223A successfully refreshed from Google Patents.
US4498223A
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Method of fabrication of monolithic integrated circuit structure
Assignee: Verizon Laboratories Inc
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Filing: 1982-04-23
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Granted: 1985-02-12
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Expires: 2002-04-23
Abstract
Abstract A body of silicon has sectors of N-type and P-type covered by silicon oxide gate layers with adjacent regions covered by a thicker silicon oxide field layer. Gate members of N-type polycrystalline silicon are placed on the gate layers to define an N-type channel region in the N-type sector and a P-type channel region is the P-type sector. P-type conductivity imparting material is introduced into the remaining regions of the N-type sector to convert them to P-type source/drain regions with an intervening N-type channel region, and N-type conductivity imparting material is introduced into the remaining regions of the P-type sector to convert them to N-type source/drain regions with an intervening P-type channel region. The exposed silicon oxide is grown to a thicker field layer and a protective oxide is formed on the polycrystalline gate members. The source/drain regions are exposed and adherent contact members of polycrystalline silicon of N and P-type are formed in ohmic contact with the source/drain regions of N and P-type, respectively. The surfaces of the polycrystalline contact members are metallized thereby shorting out rectifying junctions between N and P-type contact members.
Inventors
- 👤 Ernest A. Goldman
- 👤 Jeremiah P. McCarthy
- 👤 Paul E. Poppert
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 11:10
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/01; H10D30/021; H10D30/0223; H10D84/00; H10D84/01; H10D84/0123; H10D84/0126; H10D84/0165; H10D84/0186; H10D84/0188; H10D84/02; H10D84/03; H10D84/038; H10D84/80; H10D84/82; H10D84/83; H10D84/85; H10D84/859
Claims Analysis
Total Claims: 5
Claim 1
Independent Claim
547 words
The method of fabricating monolithic integrated circuit structure incorporating complementary field effect transistors comprising providing a body of semiconductor material having a first section of one conductivity type and a second section of the opposite conductivity type at a surface of the body with a first sector within said first section and a second sector within said second section covered by an adherent gate layer of insulating material, the portions of the surface of the body contiguous with said first and second sectors being covered by an adherent field layer of insulating material thicker than the gate layer of insulating material; placing a first gate member of semiconductor material of low resistivity over a portion of the gate layer of insulating material overlying a channel region with said channel region lying between two remaining regions of said first sector, and a second gate member of semiconductor material of low resistivity over a portion of the gate layer of insulating material overlying a channel region of said second sector with said channel region lying between two remaining regions of said second sector; introducing conductivity type imparting material of the opposite conductivity type into the two remaining regions of said first sector and introducing conductivity type imparting material of the one conductivity type into the two remaining regions of said second sector; converting the outer surfaces of the first and second gate members except at the interface with the underlying gate layer of insulating material to adherent insulating material and increasing the thickness of the gate layer of insulating material overlying the remaining regions of the first and second sectors to form a field layer; removing a portion of the field layer of insulating material overlying each of the remaining regions of the first and second sectors to expose a surface area in each of said remaining regions; forming adherent contact members of semiconductor material of the opposite conductivity type of low resistivity on and in ohmic contact with the exposed surface areas of the two remaining regions of the opposite conductivity type in said first sector extending over the field layer of insulating material, and forming adherent contact members of semiconductor material of the one conductivity type of low resistivity on and in ohmic contact with the exposed surface areas of the two remaining regions of the one conductivity type in said second sector extending over the field layer of insulating material, one of the contact members of semiconductor material of the one conductivity type being contiguous with one of the contact members of semiconductor material of the opposite conductivity type at a junction; and forming an adherent layer of highly conductive material on and in ohmic contact with the one contact member of semiconductor material of the one conductivity type and on and in ohmic contact with the one contact member of semiconductor material of the opposite conductivity type in the regions of the contact members in which the one contact member of semiconductor material of the one conductivity type and the one contact member of semiconductor material of the opposite conductivity type are contiguous thereby shorting out the rectifying junction between the one contact member of semiconductor material of the one conductivity type and the one contact member of semiconductor material of the opposite conductivity type.
Claim 2
Independent Claim
547 words
The method of fabricating monolithic integrated circuit structure incorporating complementary field effect transistors comprising providing a body of semiconductor material having a first section of one conductivity type and a second section of the opposite conductivity type at a surface of the body with a first sector within said first section and a second sector within said second section covered by an adherent gate layer of insulating material, the portions of the surface of the body contiguous with said first and second sectors being covered by an adherent field layer of insulating material thicker than the gate layer of insulating material; placing a first gate member of semiconductor material of low resistivity over a portion of the gate layer of insulating material overlying a channel region with said channel region lying between two remaining regions of said first sector, and a second gate member of semiconductor material of low resistivity over a portion of the gate layer of insulating material overlying a channel region of said second sector with said channel region lying between two remaining regions of said second sector; introducing conductivity type imparting material of the opposite conductivity type into the two remaining regions of said first sector and introducing conductivity type imparting material of the one conductivity type into the two remaining regions of said second sector; converting the outer surfaces of the first and second gate members except at the interface with the underlying gate layer of insulating material to adherent insulating material and increasing the thickness of the gate layer of insulating material overlying the remaining regions of the first and second sectors to form a field layer; removing a portion of the field layer of insulating material overlying each of the remaining regions of the first and second sectors to expose a surface area in each of said remaining regions; forming adherent contact members of semiconductor material of the opposite conductivity type of low resistivity on and in ohmic contact with the exposed surface areas of the two remaining regions of the opposite conductivity type in said first sector extending over the field layer of insulating material, and forming adherent contact members of semiconductor material of the one conductivity type of low resistivity on and in ohmic contact with the exposed surface areas of the two remaining regions of the one conductivity type in said second sector extending over the field layer of insulating material, one of the contact members of semiconductor material of the one conductivity type being contiguous with one of the contact members of semiconductor material of the opposite conductivity type at a junction; and forming an adherent layer of highly conductive material on and in ohmic contact with the one contact member of semiconductor material of the one conductivity type and on and in ohmic contact with the one contact member of semiconductor material of the opposite conductivity type in the regions of the contact members in which the one contact member of semiconductor material of the one conductivity type and the one contact member of semiconductor material of the opposite conductivity type are contiguous thereby shorting out the rectifying junction between the one contact member of semiconductor material of the one conductivity type and the one contact member of semiconductor material of the opposite conductivity type.
Claim 3
Dependent Claim
116 words
The method in accordance with claim 1 wherein simultaneously with removing a portion of the field layer of insulating material overlying each of the remaining regions of the first and second sectors, also removing a portion of the adherent insulating material at the outer surfaces of each of the first and second gate members to expose underlying semiconductor material of low resistivity; and simultaneously with forming adherent contact members of the one conductivity type, also forming adherent first and second gate contact members of semiconductor material of the one conductivity type of low resistivity on and in ohmic contact with the exposed underlying semiconductor material of low resistivity of the first and second gate members, respectively.
Claim 4
Dependent Claim
60 words
The method in accordance with claim 2 wherein said body of semiconductor material is of single crystal silicon; and said first gate member of semiconductor material, said second gate member of semiconductor material, said contact member of semiconductor material of the one conductivity type, and said contact member of semiconductor material of the opposite conductivity type are of polycrystalline silicon.
Claim 5
Dependent Claim
60 words
The method in accordance with claim 3 wherein said gate layer of insulating material and said field layer of insulating material are of silicon oxide; and converting the outer surfaces of the first and second gate members to adherent insulating material and increasing the thickness of the gate layer of insulating material comprises exposing said body to an oxidizing atmosphere.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1988-02-12 | 1988-08-13 | 1989-02-12 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1992-02-12 | 1992-08-13 | 1993-02-12 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1996-02-12 | 1996-08-13 | 1997-02-12 | $7700.00 | Window Closed / Lapsed |