US4495694A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method of fabricating an isolated gate JFET
Assignee: Intersil Corp
•
Filing: 1984-04-13
•
Granted: 1985-01-29
•
Expires: 2004-04-13
Abstract
Abstract A JFET having the top gate isolated from the bottom gate by an annulus source region and thin channel region and a top gate ohmic contact region isolated from the bottom gate by a deep isolation region. The isolation region and the top gate contact region are exterior the active channel region.
Inventors
- 👤 James D. Beasom
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 10:46
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/80; H10D30/83; H10D62/00; H10D62/10; H10D62/17; H10D62/343
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
131 words
A method of fabricating a thin channel junction field effect transistor comprising: diffusing impurities into a bottom gate region of a first conductivity type to form an isolation region of a second conductivity type opposite said first impurity type; diffusing impurities into said bottom gate region to form spaced source and drain regions of said second conductivity type; diffusing impurities into said isolation region to form a top gate contact region of said first conductivity type isolated from said bottom gate region by said isolation region; ion implanting impurities into said bottom gate region and said isolation region to form a channel isolation region of said second conductivity type and a top gate region of said first conductivity type covering said channel isolation region and contacting said top gate contact region.
Claim 2
Independent Claim
131 words
A method of fabricating a thin channel junction field effect transistor comprising: diffusing impurities into a bottom gate region of a first conductivity type to form an isolation region of a second conductivity type opposite said first impurity type; diffusing impurities into said bottom gate region to form spaced source and drain regions of said second conductivity type; diffusing impurities into said isolation region to form a top gate contact region of said first conductivity type isolated from said bottom gate region by said isolation region; ion implanting impurities into said bottom gate region and said isolation region to form a channel isolation region of said second conductivity type and a top gate region of said first conductivity type covering said channel isolation region and contacting said top gate contact region.
Claim 3
Dependent Claim
31 words
A method of fabrication according to claim 1, wherein said isolation and said top gate contact regions are formed to have a greater depth than said top gate and channel regions.
Claim 4
Dependent Claim
44 words
A method of fabrication according to claim 2, wherein said top gate region is formed to have a thickness in the range of 0.05 to 0.4 microns and said channel is formed to have a thickness in the range of 0.1 to 0.5 microns.
Claim 5
Dependent Claim
37 words
A method of fabrication according to claim 1, wherein said source region is formed as an annulus enclosing said drain and isolation regions, and said top gate and channel regions are formed interior to said source region.
Claim 6
Dependent Claim
57 words
A method of fabrication according to claim 4, wherein said source and drain regions are rectangular and include two opposed lateral walls along their length and wherein said isolation and top gate contact regions are exterior the portion of said channel regions defined by the perpendicular projection of said drain length wall on said source length wall.
Claim 7
Dependent Claim
45 words
A method of fabrication according to claim 1, wherein said isolation region is formed to have an impurity concentration less than the impurity concentration of said top gate region and said top gate contact region has a greater impurity concentration than said top gate region.
References Cited (Backward Citations)
US3223904A
Cited
GB1145122A
Cited
US3649385A
Cited
US4187514A
Cited
US4143392A
Cited
US4176368A
Cited
US4322738A
Cited
US4395812A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1988-01-29 | 1988-07-30 | 1989-01-29 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1992-01-29 | 1992-07-30 | 1993-01-29 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1996-01-29 | 1996-07-30 | 1997-01-29 | $7700.00 | Window Closed / Lapsed |