MOS Dynamic memory cells and method of fabricating the same

Claim 1

A MOS (Metal Oxide Semiconductor) dynamic memory cell comprising: a semiconductor substrate of a first conductivity type having a first semiconductor region of a low impurity concentration; a first electroconductive layer formed on a first insulating film provided on the surface of said first semiconductor region; a second semiconductor region of the first conductivity type formed in said semiconductor substrate by implanting ions by using said first electroconductive layer as a mask and having one end contacting one end of the surface region of said first semiconductor region, said second semiconductor region having a higher impurity concentration than that of said first semiconductor region; a second electroconductive layer formed on a second insulating layer provided on the surface of said second semiconductor region and extended along a third insulating layer provided on said first electroconductive layer; a third semiconductor region formed in said semiconductor substrate and having one end in contact with the other end of said second semiconductor region, said third semiconductor region having a second conductivity type and being in contact also with a portion of the substrate, said portion having the same impurity concentration as said first semiconductor region; means for applying different potentials to said third semiconductor region and to said first and second electroconductive layers; an inversion layer being formed in said surface region of said first semiconductor region by two means in which one means includes means for applying a voltage between said first electroconductive layer and said semiconductor substrate and the other means includes the impurity concentration of said first semiconductor region being at less than 5×10 14 cm -3 ; one end of said inversion layer adjacent to said second semiconductor region and one end of said first electroconductive layer adjacent to said second semiconductor region being aligned with each other; said one end of said inversion layer and the corresponding end of said second semiconductor region being closely contacted with each other; and said inversion layer being used as a depletion mode MOS capacitor.