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US4480196A Expired / Lapsed US ⏱️ 0.0 years remaining

Input protection circuits for integrated circuit devices

Assignee: Nortel Networks Ltd
•
Filing: 1982-05-21
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Granted: 1984-10-30
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Expires: 2002-05-21
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Abstract

Abstract An imput of a CMOS integrated circuit device is protected from excessive voltage swings at an input terminal by a protection circuit which comprises two series-connected protective stages between the device input terminal and the input. Each protective stage comprises a current-limiting series resistor and clamping diodes connected to the supply voltages of the device. The two stages enable the series resistance of the protection circuit to be much lower than that required for a single stage diode clamping arrangement, this being particularly advantageous if the device is an analog-to-digital converter for converting to digital values analog voltages present at the input terminal.

Inventors

  • 👤 Lorne C. Hinz
  • 👤 David R. Whiting

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-04 10:33
CPC Classifications
H; H03; H03K; H03K17/00; H03K17/08; H03K17/081; H03K17/0812; H03K17/08122

Claims Analysis

Total Claims: 13
Claim 1
Independent Claim 123 words
A circuit arrangement comprising an integrated circuit device two supply voltage lines connected to said device for supplying respective predetermined supply voltages thereto, and a protection circuit connected between an input terminal and an input of said device, the protection circuit comprising a first resistor connected between the input terminal and a junction point, a first clamping diode connected between the junction point and one of said supply voltage lines, a second resistor coupled between the junction point and the device input, and a second clamping diode connected between the device input and said one of said supply voltage lines, each of said diodes being poled to be reverse-biased in response to voltages between said supply voltages being applied to said input terminal.
Claim 2
Dependent Claim 123 words
A circuit arrangement comprising an integrated circuit device two supply voltage lines connected to said device for supplying respective predetermined supply voltages thereto, and a protection circuit connected between an input terminal and an input of said device, the protection circuit comprising a first resistor connected between the input terminal and a junction point, a first clamping diode connected between the junction point and one of said supply voltage lines, a second resistor coupled between the junction point and the device input, and a second clamping diode connected between the device input and said one of said supply voltage lines, each of said diodes being poled to be reverse-biased in response to voltages between said supply voltages being applied to said input terminal.
Claim 3
Dependent Claim 19 words
A circuit arrangement as claimed in claim 1 wherein said integrated circuit device comprises a CMOS integrated circuit device.
Claim 4
Dependent Claim 27 words
A circuit arrangement as claimed in claim 2 wherein said integrated circuit device comprises an analog-to-digital converter and the device input is an analog signal input thereof.
Claim 5
Dependent Claim 43 words
A circuit arrangement as claimed in claim 1, 2, or 3 and including a smoothing capacitor having a first terminal connected to said junction point or to said device input and having a second terminal connected to one of said supply voltage lines.
Claim 6
Dependent Claim 28 words
A circuit arrangement as claimed in claim 1 wherein the first diode has a forward voltage-current characteristic with a greater voltage drop than that of the second diode.
Claim 7
Dependent Claim 90 words
A circuit arrangement as claimed in claim 1, 2, or 5 and including a third diode, having characteristics similar to those of the first diode, connected between the junction point and said other of the supply voltage lines, and a fourth diode, having characteristics similar to those of the second diode, connected between the device input and said other of the supply voltage lines, each of the third and fourth diodes being poled to be reverse-biased in response to voltages between the supply voltages being applied to said input terminal.
Claim 8
Dependent Claim 20 words
A circuit arrangement as claimed in claim 1, 2, or 5 wherein said second diode is a Schottky barrier diode.
Claim 9
Dependent Claim 147 words
A circuit arrangement comprising a CMOS integrated circuit analog-to-digital converter having an analog signal input, two supply voltage lines connected to said converter for supplying respective predetermined supply voltages thereto, and a protection circuit connected between an input terminal and said analog signal input, the protection circuit comprising a first resistor connected between the input terminal and a junction point, a first pair of diodes, each diode of the first pair being connected between the junction point and a respective one of the supply voltage lines, a second resistor connected between the junction point and said analog signal input, and a second pair of diodes, each diode of the second pair being connected between said analog signal input and a respective one of the supply voltage lines, the diodes being poled to be reverse-biased when a voltage between said supply voltages is applied to the input terminal.
Claim 10
Dependent Claim 147 words
A circuit arrangement comprising a CMOS integrated circuit analog-to-digital converter having an analog signal input, two supply voltage lines connected to said converter for supplying respective predetermined supply voltages thereto, and a protection circuit connected between an input terminal and said analog signal input, the protection circuit comprising a first resistor connected between the input terminal and a junction point, a first pair of diodes, each diode of the first pair being connected between the junction point and a respective one of the supply voltage lines, a second resistor connected between the junction point and said analog signal input, and a second pair of diodes, each diode of the second pair being connected between said analog signal input and a respective one of the supply voltage lines, the diodes being poled to be reverse-biased when a voltage between said supply voltages is applied to the input terminal.
Claim 11
Dependent Claim 24 words
A circuit arrangement as claimed in claim 8 wherein each of the diodes of the second pair of diodes is a Schottky barrier diode.
Claim 12
Dependent Claim 26 words
A circuit arrangement as claimed in claim 9 and including a smoothing capacitor connected between said analog signal input and one of the supply voltage lines.
Claim 13
Dependent Claim 62 words
A circuit arrangement as claimed in claim 8, 9, or 10 and including a resistor connected between the input terminal and one of the supply voltage lines and a circuit to be monitored connected between the input terminal and the other of the supply voltage lines, whereby a digital output of the converter represents the state of the circuit to be monitored.

References Cited (Backward Citations)

US3906298A Cited
US4086642A Cited
US4048584A Cited
US4157513A Cited
US4131928A Cited
US4281260A Cited
US4208594A Cited
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USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1987-10-30 1988-04-30 1988-10-30 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1991-10-30 1992-04-30 1992-10-30 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1995-10-30 1996-04-30 1996-10-30 $7700.00 Window Closed / Lapsed

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