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US4414599A
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Arrester and a semiconductor circuit arrangement with a protection device including the same
Assignee: Toshiba Corp
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Filing: 1982-03-11
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Granted: 1983-11-08
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Expires: 2002-03-11
Abstract
Abstract An arrester is provided including series connected first and second nonlinear resistance elements and a by-pass circuit. The by-pass circuit is connected in parallel with the second nonlinear resistance element and short-circuits the second nonlinear resistance element only when a voltage of a predetermined polarity is applied to the second nonlinear resistance element. An semiconductor circuit arrangement with a protection device is also provided, where the arrester is used for protecting a semiconductor device.
Inventors
- 👤 Sumio Kobayashi
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-27 21:00
CPC Classifications
H; H03; H03K; H03K17/00; H03K17/08; H03K17/082; H03K17/0824; H02; H02M; H02M1/00; H02M1/08; H02M1/088
Claims Analysis
Total Claims: 16
Claim 1
Independent Claim
56 words
An arrester comprising: first nonlinear resistance means; second nonlinear resistance means connected in series with said first nonlinear resistance means; and by-pass circuit means connected in parallel with said second nonlinear resistance means for short-circuiting said second nonlinear resistance means only when a voltage of a predetermined polarity is applied to said second nonlinear resistance means.
Claim 2
Dependent Claim
56 words
An arrester comprising: first nonlinear resistance means; second nonlinear resistance means connected in series with said first nonlinear resistance means; and by-pass circuit means connected in parallel with said second nonlinear resistance means for short-circuiting said second nonlinear resistance means only when a voltage of a predetermined polarity is applied to said second nonlinear resistance means.
Claim 3
Dependent Claim
17 words
The arrester according to claim 1, wherein: said first and second nonlinear resistance means include zinc oxide.
Claim 4
Dependent Claim
14 words
The arrester according to claim 1, wherein: said by-pass circuit means includes a diode.
Claim 5
Dependent Claim
54 words
The arrester according to claim 1, wherein: said by-pass circuit means includes a series circuit of a plurality of diodes; said second nonlinear resistance means includes a series connection of a like plurality of nonlinear resistance element portions; each of said diodes is connected in parallel with each said corresponding nonlinear resistance element portion.
Claim 6
Dependent Claim
32 words
The arrester according to claim 1, wherein: the resistance value of said second nonlinear resistance means is used 35 percent with respect to the resistance value of said first nonlinear resistance means.
Claim 7
Dependent Claim
31 words
The arrester according to claim 1, further comprising: current detection means connected to detect a current flowing through said by-pass circuit means for producing a signal based on said detected current.
Claim 8
Dependent Claim
49 words
The arrester according to claim 6, wherein: said current detection means includes a current transformer connected to detect the current flowing through said by-pass circuit means, and a light emitting diode connected to said current transformer for producing a light signal as said signal based on said detected current.
Claim 9
Dependent Claim
80 words
A semiconductor circuit arrangement, comprising: a semiconductor valve including at least one semiconductor device; and protection means connected to said semiconductor valve for protecting said semiconductor device; said protection means including an arrester, said arrester including series connected first and second nonlinear resistance means, and by-pass circuit means connected in parallel with said second nonlinear resistance means for short-circuiting said second nonlinear resistance means only when a voltage of a predetermined polarity is applied to said second nonlinear resistance means.
Claim 10
Dependent Claim
80 words
A semiconductor circuit arrangement, comprising: a semiconductor valve including at least one semiconductor device; and protection means connected to said semiconductor valve for protecting said semiconductor device; said protection means including an arrester, said arrester including series connected first and second nonlinear resistance means, and by-pass circuit means connected in parallel with said second nonlinear resistance means for short-circuiting said second nonlinear resistance means only when a voltage of a predetermined polarity is applied to said second nonlinear resistance means.
Claim 11
Dependent Claim
55 words
The semiconductor circuit arrangement according to claim 8, wherein: said semiconductor valve includes a series circuit of a plurality of said semiconductor devices and a reactor; said protection means includes a series circuit of a like plurality of said arrester; and each of said arresters is connected in parallel with each said corresponding semiconductor device.
Claim 12
Dependent Claim
55 words
The semiconductor circuit arrangement according to claim 8, wherein: said semiconductor valve includes a series circuit of a plurality of modules, each module including said semiconductor device; said protection means includes a series circuit of a like plurality of said arresters; and each of said arresters is connected in parallel with each said corresponding module.
Claim 13
Dependent Claim
79 words
The semiconductor circuit arrangement according to claim 8, further comprising gate pulse generator means for controlling said semiconductor device to turn on or turn off, wherein: said arrester further includes current detection means connected to detect a current flowing through said by-pass circuit means for producing a signal based on said detected current; and said gate pulse generator means is further connected to said arrester for receiving said signal and for protecting said semiconductor device based on said signal.
Claim 14
Dependent Claim
126 words
The semiconductor circuit arrangement according to claim 8, further comprising gate pulse generator means for controlling said semiconductor device to turn on or turn off, wherein: said semiconductor valve includes a series circuit of a plurality of said semiconductor devices and a reactor; said protection means includes a series circuit of a like plurality of said arresters, each of said arresters being connected in parallel with each said corresponding semiconductor device; each of said arrester further includes current detection means connected to detect a current flowing through said by-pass circuit means for producing a signal based on said detected current; and each of said semiconductor devices is further connected to each said corresponding current detection means for receiving said signal to be protected by said signal.
Claim 15
Dependent Claim
28 words
The semiconductor circuit arrangement according to claim 8, 9, 10, 11 or 12, wherein: said semiconductor valve is a thyristor valve; and said semiconductor device is a thyristor.
Claim 16
Dependent Claim
26 words
The semiconductor circuit arrangement according to claim 11 or 12, wherein: said semiconductor valve is a thyristor valve; and said semiconductor device is a photo thyristor.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1986-11-07 | 1987-05-09 | 1987-11-08 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1990-11-07 | 1991-05-09 | 1991-11-08 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1994-11-07 | 1995-05-09 | 1995-11-08 | $7700.00 | Window Closed / Lapsed |