Patent US4461672A successfully refreshed from Google Patents.
US4461672A
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Process for etching tapered vias in silicon dioxide
Assignee: Texas Instruments Inc
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Filing: 1982-11-18
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Granted: 1984-07-24
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Expires: 2002-11-18
Abstract
Abstract A method for etching tapered apertures in the insulating layer between metal layers in an integrated circuit having a multilevel interconnection system. In one embodiment a thin layer of polysilicon is formed on the interlevel oxide layer followed by deposition of a photoresist layer thereon. A pattern of apertures is formed in the resist layer which is then exposed to a selective silicon etchant to form an opening in the polysilicon layer extending to the surface of the oxide layer. The polysilicon and oxide layers are then etched with a nonselective etchant. During the oxide etch the polysilicon is etched laterally, thereby widening the apertures and producing a taper in the aperture sidewalls as the etch proceeds. The magnitude of the taper is related to the thickness of the polysilicon layer. In another embodiment wherein the oxide layer directly overlies a silicon region, the polysilicon and oxide layers are first exposed to a nonselective etchant to etch partially through the oxide layer. The tapered via is completed by etching through the oxide layer with a selective etchant.
Inventors
- 👤 Mary E. Musser
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-28 09:18
CPC Classifications
H; H10; H10P; H10P50/00; H10P50/20; H10P50/26; H10P50/264; H10P50/266; H10P50/267; H10P50/268; H10P50/28; H10P50/282; H10P50/283; H10P50/73; H10W; H10W20/00; H10W20/01; H10W20/071; H10W20/081; H10W20/082
Claims Analysis
Total Claims: 13
Claim 1
Independent Claim
95 words
A method for fabricating a semiconductor device comprising the steps of: forming an insulating layer on a surface of a semiconductor body; depositing a semiconductor layer of a predetermined thickness on said insulating layer; selectively masking said semiconductor layer with an apertured resist; exposing said device to a selective etchant to form an opening in said semiconductor layer extending to the surface of said insulating layer; and exposing said device to a nonselective etchant for etching said semiconductor layer and said insulating layer at predetermined rates, whereby tapered apertures are formed in said insulating layer.
Claim 2
Independent Claim
95 words
A method for fabricating a semiconductor device comprising the steps of: forming an insulating layer on a surface of a semiconductor body; depositing a semiconductor layer of a predetermined thickness on said insulating layer; selectively masking said semiconductor layer with an apertured resist; exposing said device to a selective etchant to form an opening in said semiconductor layer extending to the surface of said insulating layer; and exposing said device to a nonselective etchant for etching said semiconductor layer and said insulating layer at predetermined rates, whereby tapered apertures are formed in said insulating layer.
Claim 3
Dependent Claim
22 words
The method of claim 1, wherein the magnitude of said taper is determined by selecting the appropriate thickness of said semiconductor layer.
Claim 4
Dependent Claim
18 words
The method of claim 2 wherein said insulating layer comprises silicon dioxide and said semiconductor layer comprises polysilicon.
Claim 5
Independent Claim
112 words
A method for fabricating a semiconductor device comprising the steps of: depositing a layer of silicon dioxide on a silicon substrate, said substrate including a patterned conducting layer thereon; depositing a layer of polysilicon of a predetermined thickness on said silicon dioxide layer; selectively masking said polysilicon layer with an apertured resist; exposing said device to a selective etchant to form an opening in said polysilicon layer extending to the surface of said silicon dioxide layer; and exposing said device to a nonselective etchant for etching said polysilicon layer and said silicon dioxide layer at predetermined rates, whereby tapered apertures are formed in said silicon dioxide layer extending to said conducting layer.
Claim 6
Independent Claim
112 words
A method for fabricating a semiconductor device comprising the steps of: depositing a layer of silicon dioxide on a silicon substrate, said substrate including a patterned conducting layer thereon; depositing a layer of polysilicon of a predetermined thickness on said silicon dioxide layer; selectively masking said polysilicon layer with an apertured resist; exposing said device to a selective etchant to form an opening in said polysilicon layer extending to the surface of said silicon dioxide layer; and exposing said device to a nonselective etchant for etching said polysilicon layer and said silicon dioxide layer at predetermined rates, whereby tapered apertures are formed in said silicon dioxide layer extending to said conducting layer.
Claim 7
Dependent Claim
29 words
The method of claim 4 wherein said predetermined etch rates are selected so that the etch rate of polysilicon is substantially equal to the etch rate of silicon dioxide.
Claim 8
Dependent Claim
22 words
The method of claim 5 wherein the magnitude of said taper is determined by selecting the appropriate thickness of said polysilicon layer.
Claim 9
Dependent Claim
46 words
The method of claim 6, further including the steps of: removing said apertured resist; forming a second patterned metal layer overlying said polysilicon layer and said aperture, whereby an electrical connection is established between said second metal layer and said first metal layer through said aperture.
Claim 10
Independent Claim
112 words
A method for fabricating a semiconductor device comprising the steps of: forming an insulating layer on a surface of a semiconductor body; depositing a semiconductor layer of a predetermined thickness on said insulating layer; selectively masking said semiconductor layer with an apertured resist; exposing said insulating layer to a first etchant nonselective as between said semiconductor and said insulator for a length of time sufficient to etch partially through said insulating layer, whereby a thin insulating region remains over said substrate; and exposing said insulating layer to a second etchant selective for said insulator to etch through said thin insulating region to form an aperture in said insulating layer having tapered sidewalls.
Claim 11
Independent Claim
112 words
A method for fabricating a semiconductor device comprising the steps of: forming an insulating layer on a surface of a semiconductor body; depositing a semiconductor layer of a predetermined thickness on said insulating layer; selectively masking said semiconductor layer with an apertured resist; exposing said insulating layer to a first etchant nonselective as between said semiconductor and said insulator for a length of time sufficient to etch partially through said insulating layer, whereby a thin insulating region remains over said substrate; and exposing said insulating layer to a second etchant selective for said insulator to etch through said thin insulating region to form an aperture in said insulating layer having tapered sidewalls.
Claim 12
Dependent Claim
26 words
The method of claim 8 wherein the magnitude of the taper of said aperture sidewalls is determined by selecting the appropriate thickness of said semiconductor layer.
Claim 13
Dependent Claim
18 words
The method of claim 9 wherein said insulating layer comprises silicon dioxide and said semiconductor layer comprises polysilicon.
References Cited (Backward Citations)
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| 7.5 Years (Year 8) | 1991-07-24 | 1992-01-23 | 1992-07-24 | $3760.00 | Window Closed / Lapsed |
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