Low resistance contact for high density integrated circuit

Claim 1

A process for forming low resistance metal contacts for a high density integrated circuit, the integrated circuit having shallow drain and source regions of a first conductivity type formed in a semiconductor body of a second conductivity type, a first oxide layer formed directly on the semiconductor body over the drain and source regions and a second oxide layer formed on the first oxide layer, comprising the steps of: forming first contact openings through the first and second layers, the openings aligned with respect to the drain and source regions to expose contact areas thereon; forming a layer of apertured masking material over the second oxide layer, the apertures of the masking material being in corresponding registry with and larger than the corresponding contact openings in the first and second oxide layers; implanting conductivity modifiers of the first conductivity type into both the exposed contact areas and into the unmasked regions of the second oxide layer surrounding the contact openings; removing the layer of apertured masking material; heating the semiconductor body to anneal any damage induced in the contact area and to flow the implanted unmasked regions of the second oxide layer surrounding the contact openings; and forming metal lines on the second oxide layer in direct ohmic contact with the contact areas of the drain and source diffused regions.