Method of making self-aligned guard regions for semiconductor device elements

Claim 1

A method of defining a submicron feature on a major planar surface of a semiconductor body comprising the step of forming on said surface a patterned insulating layer having a sidewall extending between first and second surfaces situated parallel to said major surface at differing first and second distances therefrom; depositing nonconformally a mask-forming metal layer onto said first and second surfaces, thereby inherently defining relatively thin metal layer portions at the intersection of the sidewall with the first surface and relatively thick first and second metal layer portions overlying the first and second surfaces, respectively, at regions removed from said intersection; etching the metal to remove the relatively thin portion completely and to leave at least some of both the first and second metal layers at the relatively thick portions, whereby a submicron gap in the remaining metal layer is formed at said sidewall; and using the gap to define the feature; (a) removing both said first and second metal layers simultaneously, and removing said protective layer to expose an underlying portion of the said major surface of the semiconductor body; and (b) forming an insulating spacer layer on the sidewall of the patterned layer.

Claim 2

A method of defining a submicron feature on a major planar surface of a semiconductor body comprising the step of forming on said surface a patterned insulating layer having a sidewall extending between first and second surfaces situated parallel to said major surface at differing first and second distances therefrom; depositing nonconformally a mask-forming metal layer onto said first and second surfaces, thereby inherently defining relatively thin metal layer portions at the intersection of the sidewall with the first surface and relatively thick first and second metal layer portions overlying the first and second surfaces, respectively, at regions removed from said intersection; etching the metal to remove the relatively thin portion completely and to leave at least some of both the first and second metal layers at the relatively thick portions, whereby a submicron gap in the remaining metal layer is formed at said sidewall; and using the gap to define the feature; (a) removing both said first and second metal layers simultaneously, and removing said protective layer to expose an underlying portion of the said major surface of the semiconductor body; and (b) forming an insulating spacer layer on the sidewall of the patterned layer.

Claim 19

A method for forming a guard zone for a guarded region at a major planar surface of a semiconductor body comprising the steps of: (a) forming an insulating layer on said surface within the complement of said guarded region, said insulating layer having an aperture characterized by a sidewall substantially perpendicular to said major surfaces; (b) depositing a masking layer of mask-forming material, said material being subject to a shadow effect by said sidewall, whereby the guarded region and the insulating layer are masked by first and second portions, respectively, of said masking layer, and the thickness of which masking layer is significantly reduced in a neighborhood of said sidewall as compared with the thickness thereof more removed from said sidewall; (c) implanting impurities into the body at portions of the surface thereof in a neighborhood underlying said sidewall, to form said guard zone; and (d) removing simultaneously said first and second portions of the masking layer.

Claim 20

A method for forming a guard zone for a guarded region at a major planar surface of a semiconductor body comprising the steps of: (a) forming an insulating layer on said surface within the complement of said guarded region, said insulating layer having an aperture characterized by a sidewall substantially perpendicular to said major surfaces; (b) depositing a masking layer of mask-forming material, said material being subject to a shadow effect by said sidewall, whereby the guarded region and the insulating layer are masked by first and second portions, respectively, of said masking layer, and the thickness of which masking layer is significantly reduced in a neighborhood of said sidewall as compared with the thickness thereof more removed from said sidewall; (c) implanting impurities into the body at portions of the surface thereof in a neighborhood underlying said sidewall, to form said guard zone; and (d) removing simultaneously said first and second portions of the masking layer.