US4037307A
Expired / Lapsed
US
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Methods for making transistor structures
Assignee: AT&T Inc
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Filing: 1976-11-03
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Granted: 1977-07-26
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Expires: 1996-11-03
Abstract
Abstract In one embodiment, an extremely short channel FET is made by forming a metal layer over a wafer, depositing silicon dioxide over part of the metal layer, oxidizing the exposed metal, controllably etching a portion of the silicon dioxide to expose a small strip of the nonoxidized metal layer, electroplating the exposed metal strip, thereby to form an extremely narrow gate electrode, removing the deposited SiO 2 , the metal oxide and the remaining metal layer to leave only the gate electrode, and using the gate electrode as a mask for ion implanting source and drain regions. Since the gate electrode can be made so narrow, the channel region is correspondingly short to give extremely high frequency capabilities. Other embodiments are also described.
Inventors
- 👤 George Elwood Smith
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-24 03:42
CPC Classifications
H; H10; H10D; H10D64/00; H10D64/01; H10D64/013; H10D64/01302; H10D64/01304; H10D48/00; H10D48/30; H10D48/32; H10D48/36; H10D99/00; H10P; H10P14/00; H10P14/60; H10P95/00; Y; Y10; Y10S; Y10S148/00; Y10S148/131; Y10S438/00; Y10S438/942; Y10S438/945; Y10S438/947; Y10S438/981
Claims Analysis
Total Claims: 13
Claim 1
Independent Claim
191 words
A method for making transistors comprising the steps of: forming over a semiconductor substrate a first mask (e.g., 14) having an exposed portion including a first vertical edge (e.g., 15) and then thereafter controllably removing a portion of the exposed surface of the first mask, including the portion of the first mask which defines the first vertical edge, to define a second vertical edge (e.g., 15') laterally removed a controlled distance from the location of the first edge; forming over the semiconductor substrate a second mask having a first vertical edge at a location corresponding to the location of the first vertical edge of the first mask and having a second vertical edge at a location corresponding to the location of the second vertical edge of the first mask, said second mask being characterized in that it inhibits impurities from passing therethrough; and forming in the semiconductor substrate first and second separate impurity regions, the first impurity region being formed at a location defined by the first edge of the second mask and the second impurity region being formed at a location defined by the second edge of the second mask.
Claim 2
Independent Claim
191 words
A method for making transistors comprising the steps of: forming over a semiconductor substrate a first mask (e.g., 14) having an exposed portion including a first vertical edge (e.g., 15) and then thereafter controllably removing a portion of the exposed surface of the first mask, including the portion of the first mask which defines the first vertical edge, to define a second vertical edge (e.g., 15') laterally removed a controlled distance from the location of the first edge; forming over the semiconductor substrate a second mask having a first vertical edge at a location corresponding to the location of the first vertical edge of the first mask and having a second vertical edge at a location corresponding to the location of the second vertical edge of the first mask, said second mask being characterized in that it inhibits impurities from passing therethrough; and forming in the semiconductor substrate first and second separate impurity regions, the first impurity region being formed at a location defined by the first edge of the second mask and the second impurity region being formed at a location defined by the second edge of the second mask.
Claim 3
Dependent Claim
84 words
The method of claim 1 further comprising the steps of: forming a metal layer (e.g., 13) over the substrate prior to forming the first mask; oxidizing that portion of the metal layer not covered by the first mask prior to removing a portion of the first mask, whereby the step of defining the second edge exposes part of the metal layer (e.g., 18); and depositing a metal (e.g., 19) such that the deposited metal adheres only to the exposed part of the metal layer.
Claim 4
Dependent Claim
25 words
The method of claim 2 wherein: the impurity regions are formed by ion implantation; and the deposited metal is used as an ion implantation mask.
Claim 5
Dependent Claim
27 words
The method of claim 3 wherein; the first mask is a layer of silicon deposited on part of the metal layer; and the metal layer is aluminum.
Claim 6
Dependent Claim
39 words
The method of claim 3 wherein: the first mask comprises a layer of silicon and the removing step comprises the step of controllably oxidizing part of the silicon layer to form silicon dioxide and selectively etching said silicon dioxide.
Claim 7
Independent Claim
137 words
A method for making a field effect transistor comprising the steps of: forming a metal layer over a semiconductor surface; forming a first mask on the wafer surface such that an edge thereof overlies the metal layer; oxidizing the exposed metal layer such that metal oxide abuts the first mask edge; controllably removing part of the first mask such that the edge of the first mask is moved to create a small gap between the first mask and the metal oxide which exposes a portion of the metal layer; depositing metal on the wafer surface such that the metal adheres only to the exposed metal layer, thereby forming a second metal mask; removing the first mask; and using opposite edges of the second metal mask to define first and second impurity regions located in the semiconductor wafer.
Claim 8
Independent Claim
137 words
A method for making a field effect transistor comprising the steps of: forming a metal layer over a semiconductor surface; forming a first mask on the wafer surface such that an edge thereof overlies the metal layer; oxidizing the exposed metal layer such that metal oxide abuts the first mask edge; controllably removing part of the first mask such that the edge of the first mask is moved to create a small gap between the first mask and the metal oxide which exposes a portion of the metal layer; depositing metal on the wafer surface such that the metal adheres only to the exposed metal layer, thereby forming a second metal mask; removing the first mask; and using opposite edges of the second metal mask to define first and second impurity regions located in the semiconductor wafer.
Claim 9
Dependent Claim
51 words
The method of claim 6 wherein: the first mask is removed prior to the formation of any impurity regions; the second metal mask has an edge corresponding to the location of this first mask edge; and the first and second impurity regions are formed in the wafer simultaneously by ion implantation.
Claim 10
Independent Claim
179 words
A method for making a field-effect transistor comprising the steps of: forming a thick oxide layer over a semiconductor wafer surface; forming a plurality of discrete thin oxide regions on the wafer surface; forming a metal layer over the thick and thin oxide regions; depositing a relatively thick material layer over part of each thin oxide region, thereby covering part of the metal layer; oxidizing the exposed metal layer, thereby forming a metal oxide layer that abuts the thick material layer; etching uniformly a predetermined part of the deposited material layer, thereby to expose a part of the nonoxidized metal layer; depositing metal on the wafer surface such that it adheres only to the exposed metal, thereby to form a gate electrode over each thin oxide region; removing the deposited material layer; projecting by ion implantation impurities toward said wafer, said impurities having insufficient energy to penetrate the gate electrodes, whereby the gate electrodes act as implantation masks to define source and drain regions; and making metal contacts to each of the source and drain regions and gate electrodes.
Claim 11
Independent Claim
179 words
A method for making a field-effect transistor comprising the steps of: forming a thick oxide layer over a semiconductor wafer surface; forming a plurality of discrete thin oxide regions on the wafer surface; forming a metal layer over the thick and thin oxide regions; depositing a relatively thick material layer over part of each thin oxide region, thereby covering part of the metal layer; oxidizing the exposed metal layer, thereby forming a metal oxide layer that abuts the thick material layer; etching uniformly a predetermined part of the deposited material layer, thereby to expose a part of the nonoxidized metal layer; depositing metal on the wafer surface such that it adheres only to the exposed metal, thereby to form a gate electrode over each thin oxide region; removing the deposited material layer; projecting by ion implantation impurities toward said wafer, said impurities having insufficient energy to penetrate the gate electrodes, whereby the gate electrodes act as implantation masks to define source and drain regions; and making metal contacts to each of the source and drain regions and gate electrodes.
Claim 12
Dependent Claim
35 words
The method of claim 8 wherein: the wafer is of silicon; the thick and thin oxide layers are made by thermal oxidation of the silicon; and the deposited material layer is deposited SiO 2 .
Claim 13
Dependent Claim
18 words
The method of claim 8 wherein the deposited material layer is silicon, part of which is subsequently oxidized.
References Cited (Backward Citations)
US3514844A
Cited
US3699646A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1980-07-25 | 1981-01-24 | 1981-07-26 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1984-07-25 | 1985-01-24 | 1985-07-26 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1988-07-25 | 1989-01-24 | 1989-07-26 | $7700.00 | Window Closed / Lapsed |