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US4282539A Expired / Lapsed US ⏱️ 0.0 years remaining

Field effect transistor with decreased substrate control of the channel width

Assignee: Siemens AG
•
Filing: 1979-09-10
•
Granted: 1981-08-04
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Expires: 1999-09-10
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Abstract

Abstract An insulated gate field effect transistor has a channel region in a doped semiconductor substrate covered by a thin film region of the insulating layer and has borders defined by thick film regions disposed parallel to the source-drain direction. The transistor further includes a pair of narrow strip zones in the region of the channel borders also running parallel to the source-drain direction which are doped weaker than and oppositely to the substrate doping to partially compensate the substrate doping and in transistors of the depletion type can overcompensate the substrate doping. The compensation provided by the strip zones decreases the substrate control effect so that the effective channel width of the transistor is less susceptible to fluctuations in operating voltages.

Inventors

  • 👤 Lothar Schrader

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-28 01:52
CPC Classifications
H; H10; H10D; H10D62/00; H10D62/10; H10D62/17; H10D62/213; H10D62/221; H10D62/235; H10D30/00; H10D30/60; H10D30/637; H10D62/299

Claims Analysis

Total Claims: 7
Claim 1
Independent Claim 128 words
An insulated gate field effect transistor comprised of a semiconductor body of a first conductivity type having a first doping level, a source region and a drain region of the opposite conduction type in the semiconductor body, an insulating layer covering an upper surface of the semiconductor body, said insulating layer having thick film regions surrounding a thin film region, said thin film region disposed above an area of the semiconductor body between the source and drain regions to define a channel region in the semiconductor body, and a pair of narrow strip zones in the semiconductor body parallel to a source-to-drain direction and disposed at the edges of said channel region, said strip zones having additional doping of a conductivity type opposite to the first conductivity type.
Claim 2
Dependent Claim 128 words
An insulated gate field effect transistor comprised of a semiconductor body of a first conductivity type having a first doping level, a source region and a drain region of the opposite conduction type in the semiconductor body, an insulating layer covering an upper surface of the semiconductor body, said insulating layer having thick film regions surrounding a thin film region, said thin film region disposed above an area of the semiconductor body between the source and drain regions to define a channel region in the semiconductor body, and a pair of narrow strip zones in the semiconductor body parallel to a source-to-drain direction and disposed at the edges of said channel region, said strip zones having additional doping of a conductivity type opposite to the first conductivity type.
Claim 3
Dependent Claim 63 words
The insulated gate field effect transistor of claim 1 which further comprises additional regions in said semiconductor body beneath said thick film regions doped with a conductivity type to increase the concentration of the substrate doping, said additional regions extending to and terminating adjacent said channel region with said strip zones implanted in said additional regions on each side of said channel region.
Claim 4
Dependent Claim 17 words
The insulated gate field effect transistor of claim 1 wherein said transistor is of the depletion type.
Claim 5
Dependent Claim 22 words
The insulated gate field effect transistor of claim 3 wherein said gate and said source region are conductively connected with each other.
Claim 6
Dependent Claim 55 words
The insulated gate field effect transistor of claim 4 wherein said semiconductor substrate has an additional doping in said channel region, said additional doping being opposed to said substrate doping to reverse the conduction type of said channel region, with the strip zones having a doping concentration exceeding said additional doping in said channel region.
Claim 7
Dependent Claim 17 words
The insulated gate field effect transistor of claim 1 wherein said transistor is of the enhancement type.

References Cited (Backward Citations)

US4011576A Cited
US4193080A Cited
US4011105A Cited
DE2641334A1 Cited
US4198252A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1984-08-03 1985-02-02 1985-08-04 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1988-08-03 1989-02-02 1989-08-04 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1992-08-03 1993-02-02 1993-08-04 $7700.00 Window Closed / Lapsed

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