Monolithic voltage divider

Claim 2

A monolithic integrated circuit for dividing the voltage supplied by a power supply comprising: a plurality of capacitors wherein one of the capacitors is a reference capacitor; switching means for periodically coupling at least two of the capacitors in series to the power supply during a first time period and for periodically coupling at least two of the capacitors in parallel during a second time period such that the voltage across one of the capacitors provides a reference voltage which approaches a predetermined fraction of the supply voltage of the power supply; and a voltage regulator having an input operably connected to the capacitor providing the reference voltage, and an output which provides a supply voltage at the predetermined fraction of the power supply, said voltage regulator having an input impedance in excess of 10 megohms to minimize loading of the capacitors.

Claim 3

The voltage divider of claim 1 wherein the predetermined fraction is one-half.

Claim 4

The voltage divider of claim 1 wherein the predetermined fraction is one-third.

Claim 5

The voltage divider of claim 1 wherein the voltage regulator includes a differential amplifier having an input transistor with an input impedance in excess of 10 megohms, said input transistor having a gate operably connected to the reference capacitor.

Claim 6

The voltage divider of claim 4 wherein the differential amplifier includes a weak inversion current source wherein the power consumed by the differential amplifier is reduced.

Claim 7

The voltage divider of claim 1 wherein the voltage regulator includes a buffer driver for operable connection to a load, said buffer driver to buffer the capacitors from the load to prevent loading of the capacitors by the load.

Claim 8

The voltage divider of claim 1 wherein the power supply has a positive terminal and a negative terminal and each of the capacitors has a positive plate and a negative plate, said switching means comprising a first switching transistor operably connecting one plate of the first capacitor to the positive terminal of the power supply and a second switching transistor operably connecting the other plate of the first capacitor to one plate of the second capacitor; and wherein the other plate of the second capacitor is operably connected to the negative terminal of the power supply and said switching means further comprises control signal means for turning the first and second switching transistors on during the first time period so that the first and second capacitors are connected in series to the power supply during the first time period.

Claim 9

The voltage divider circuit of claim 7 wherein the switching means further comprises a third switching transistor operably connecting the positive plate of the first capacitor to the positive plate of the second capacitor and a fourth switching transistor operably connecting the negative plate of the first capacitor to the negative plate of the second capacitor, and the control signal means further comprising means for turning the first and second switching transistors off and for turning the third and fourth switching transistors on during the second time period, so that the first and second capacitors are operably connected in parallel during the second time period.

Claim 10

The voltage divider circuit of claim 8 wherein the control signal means further comprises delay means for delaying the turning on of the third and fourth switching transistors until the first and second switching transistors are turned off and for delaying the turning on of the first and second switching transistors until the third and fourth switching transistors are turned off to prevent the discharge of the first and second capacitors while the capacitors are being switched from series connection to parallel connection and vice versa.

Claim 11

The voltage divider circuit of claim 1 further comprising a third capacitor operably connected to one of the first and second capacitors to compensate for parasitic capacitance in the monolithlic integrated circuit.

Claim 12

The voltage divider circuit of claim 10 further comprising means for operably connecting the third capacitor in parallel with the first and second capacitors during the second time period to compensate for parasitic capacitance in the monolithic integrated circuit.

Claim 13

A monolithic integrated circuit for dividing the voltage supplied by a power supply comprising: first and second capacitors; switching means for cyclically connecting the capacitors in series to the power supply during a first time period and for cyclically connecting the capacitors in parallel during a second time period such that the voltage across one of the capacitors provides a reference voltage which approaches a predetermined fraction of the supply voltage of the power supply; and a voltage regulator which includes a CMOS differential amplifier and a buffer driver transistor, said amplifier having an input operably connected to the capacitor providing the reference voltage and an output operably connected to the driver transistor, said regulator being responsive to the reference voltage for providing a regulated output from the driver transistor, and said amplifier input having a sufficiently large input impedance such that the capacitors may be small enough for practical fabrication as a portion of the monolithic integrated circuit.

Claim 14

A monolithic integrated circuit for dividing the voltage supplied by a power supply comprising: first and second capacitors; switching means for cyclically connecting the capacitors in series to the power supply during a first time period and for cyclically connecting the capacitors in parallel during a second time period such that the voltage across one of the capacitors provides a reference voltage which approaches a predetermined fraction of the supply voltage of the power supply; and a voltage regulator which includes a CMOS differential amplifier and a buffer driver transistor, said amplifier having an input operably connected to the capacitor providing the reference voltage and an output operably connected to the driver transistor, said regulator being responsive to the reference voltage for providing a regulated output from the driver transistor, and said amplifier input having a sufficiently large input impedance such that the capacitors may be small enough for practical fabrication as a portion of the monolithic integrated circuit.

Claim 15

A monolithic integrated circuit for dividing the voltage supplied by a power supply by a third, comprising: first, second, and third capacitors wherein the third capacitors is a reference capacitor; switching means for periodically coupling the capacitors in series to the power supply during a first and a third time period, for coupling the first and second capacitors in parallel during a second time period and for coupling the second and reference capacitors in parallel during a fourth time period such that the voltage across the reference capacitor provides a reference voltage which approaches one-third of the supply voltage of the power supply; and a voltage regulator having an input operably connected to the reference capacitor and an output which provides a supply voltage at one-third of the power supply voltage, said voltage regulator having an input impedance in excess of 10 megohms to minimize loading of the capacitors by the regulator.

Claim 16

A monolithic integrated circuit for dividing the voltage supplied by a power supply by a third, comprising: first, second, and third capacitors wherein the third capacitors is a reference capacitor; switching means for periodically coupling the capacitors in series to the power supply during a first and a third time period, for coupling the first and second capacitors in parallel during a second time period and for coupling the second and reference capacitors in parallel during a fourth time period such that the voltage across the reference capacitor provides a reference voltage which approaches one-third of the supply voltage of the power supply; and a voltage regulator having an input operably connected to the reference capacitor and an output which provides a supply voltage at one-third of the power supply voltage, said voltage regulator having an input impedance in excess of 10 megohms to minimize loading of the capacitors by the regulator.

Claim 17

A monolithic integrated circuit for dividing the voltage supplied by a power supply by a third, comprising: first, second, third and fourth capacitors wherein the fourth capacitor is a reference capacitor; switching means for periodically coupling the second and third capacitors in parallel and the parallel combination of the second and third capacitors in series with the first and reference capacitors to the power supply during a first time period and for coupling the first and second capacitors in parallel and the third and reference capacitors in parallel during a second time period such that the voltage across the reference capacitor provides a reference voltage which approaches one-third of the supply voltage of the power supply; and a voltage regulator having an input operably connected to the reference capacitor and an output which provides a supply voltage at one-third of the power supply voltage, said voltage regulator having an input impedance in excess of 10 megohms to minimize loading of the capacitors by the regulator.

Claim 18

A monolithic integrated circuit for dividing the voltage supplied by a power supply by a third, comprising: first, second, third and fourth capacitors wherein the fourth capacitor is a reference capacitor; switching means for periodically coupling the second and third capacitors in parallel and the parallel combination of the second and third capacitors in series with the first and reference capacitors to the power supply during a first time period and for coupling the first and second capacitors in parallel and the third and reference capacitors in parallel during a second time period such that the voltage across the reference capacitor provides a reference voltage which approaches one-third of the supply voltage of the power supply; and a voltage regulator having an input operably connected to the reference capacitor and an output which provides a supply voltage at one-third of the power supply voltage, said voltage regulator having an input impedance in excess of 10 megohms to minimize loading of the capacitors by the regulator.

Claim 19

A monolithic integrated circuit for dividing the voltage supplied by a power supply comprising: a plurality of capacitors wherein one of the capacitors is a reference capacitor; switching means for periodically coupling the capacitors in series to the power supply during a first time period and for alternately coupling one or more pairs of capacitors in parallel during one or more intervening time periods such that the voltage across each capacitor approaches the same voltage wherein the voltage across the reference capacitor provides a reference voltage of the power supply determined by the number of capacitors coupled in series to the power supply during the first time period; and a voltage regulator having an input operably connected to the reference capacitor and an output which provides a supply voltage at the predetermined fraction of the power supply, said voltage regulator having an input impedance in excess of 10 megohms to minimize loading of the capacitors by the regulator.

Claim 20

A monolithic integrated circuit for dividing the voltage supplied by a power supply comprising: a plurality of capacitors wherein one of the capacitors is a reference capacitor; switching means for periodically coupling the capacitors in series to the power supply during a first time period and for alternately coupling one or more pairs of capacitors in parallel during one or more intervening time periods such that the voltage across each capacitor approaches the same voltage wherein the voltage across the reference capacitor provides a reference voltage of the power supply determined by the number of capacitors coupled in series to the power supply during the first time period; and a voltage regulator having an input operably connected to the reference capacitor and an output which provides a supply voltage at the predetermined fraction of the power supply, said voltage regulator having an input impedance in excess of 10 megohms to minimize loading of the capacitors by the regulator.

Claim 21

A monolithic integrated circuit for dividing the voltage supplied by a power supply comprising: a plurality of capacitors wherein one of the capacitors is a reference capacitor; switching means for periodically connecting the capacitors in series to the power supply during a first time period and for connecting a capacitor in parallel with the reference capacitor during a second time period such that the voltage across the reference capacitor provides a reference voltage which approaches a predetermined fraction of the supply voltage of the power supply; and a voltage regulator which includes a differential amplifier having an input transistor which has a gate operably connected to the reference capacitor, said transistor having an input impedance in excess of 10 megohms to minimize loading of the capacitors by the regulator, said regulator having an output which provides a supply voltage at the predetermined fraction of the power supply.

Claim 22

A monolithic integrated circuit for dividing the voltage supplied by a power supply comprising: a plurality of capacitors wherein one of the capacitors is a reference capacitor; switching means for periodically connecting the capacitors in series to the power supply during a first time period and for connecting a capacitor in parallel with the reference capacitor during a second time period such that the voltage across the reference capacitor provides a reference voltage which approaches a predetermined fraction of the supply voltage of the power supply; and a voltage regulator which includes a differential amplifier having an input transistor which has a gate operably connected to the reference capacitor, said transistor having an input impedance in excess of 10 megohms to minimize loading of the capacitors by the regulator, said regulator having an output which provides a supply voltage at the predetermined fraction of the power supply.

Claim 23

A monolithic integrated circuit for dividing the voltage supplied by a power supply comprising: a plurality of capacitors wherein one of the capacitors is a reference capacitor; switching means for periodically connecting the capacitors in series to the power supply during a first time period and for connecting a capacitor in parallel with the reference capacitor during a second time period such that the voltage across the reference capacitor provides a reference voltage which approaches a predetermined fraction of the supply voltage of the power supply; and a voltage regulator having an input operably connected to the reference capacitor and an output which provides a supply voltage at the predetermined fraction of the power supply, said voltage regulator having an extremely high input impedance to minimize loading of the capacitors by the regulator, said regulator including a buffer driver for operable connection to a load, said buffer driver to buffer the capacitors from the load to prevent loading of the capacitors by the load.

Claim 24

A monolithic integrated circuit for dividing the voltage supplied by a power supply comprising: a plurality of capacitors wherein one of the capacitors is a reference capacitor; switching means for periodically connecting the capacitors in series to the power supply during a first time period and for connecting a capacitor in parallel with the reference capacitor during a second time period such that the voltage across the reference capacitor provides a reference voltage which approaches a predetermined fraction of the supply voltage of the power supply; and a voltage regulator having an input operably connected to the reference capacitor and an output which provides a supply voltage at the predetermined fraction of the power supply, said voltage regulator having an extremely high input impedance to minimize loading of the capacitors by the regulator, said regulator including a buffer driver for operable connection to a load, said buffer driver to buffer the capacitors from the load to prevent loading of the capacitors by the load.

Claim 25

A monolithic integrated circuit chip for multiplying the supply voltage supplied by a power supply by a predetermined factor comprising: a plurality of capacitors disposed on the chip; switching means for cyclicly coupling at least two of the capacitors in series to the power supply during a first time period and for cyclicly coupling at least two of the capacitors in parallel during a second time period so that at least one of the capacitors provides a reference voltage; and a voltage regulator having an input operably connected to the capacitor providing the reference voltage, said regulator being responsive to the reference voltage for providing a regulated output at a voltage level which is equal to the supply voltage multiplied by the predetermined factor, and said regulator input having a sufficiently large input impedance such that the capacitors may be small enough for practical fabrication as a portion of the monolithic integrated circuit.

Claim 26

A monolithic integrated circuit chip for multiplying the supply voltage supplied by a power supply by a predetermined factor comprising: a plurality of capacitors disposed on the chip; switching means for cyclicly coupling at least two of the capacitors in series to the power supply during a first time period and for cyclicly coupling at least two of the capacitors in parallel during a second time period so that at least one of the capacitors provides a reference voltage; and a voltage regulator having an input operably connected to the capacitor providing the reference voltage, said regulator being responsive to the reference voltage for providing a regulated output at a voltage level which is equal to the supply voltage multiplied by the predetermined factor, and said regulator input having a sufficiently large input impedance such that the capacitors may be small enough for practical fabrication as a portion of the monolithic integrated circuit.

Claim 27

The integrated circuit chip of claim 18 wherein the predetermind factor is one half.

Claim 28

A monolithic integrated circuit for dividing the voltage supplied by a power supply and driving a load, comprising: first and second capacitors; switching means for cyclicly coupling the capacitors in series to the power supply during a first time period and for cyclicly coupling the capacitors in parallel during a second time period so that the voltage across one of the capacitors provides a reference voltage which approaches a predetermined fraction of the supply voltage of the power supply; and a voltage regulator having an input operably connected to the capacitor providing the reference voltage, and a buffer driver to buffer the capacitors from the load to prevent loading of the capacitors by the load, said regulator being responsive to the reference voltage for providing a regulated output from the buffer driver.

Claim 29

A monolithic integrated circuit for dividing the voltage supplied by a power supply and driving a load, comprising: first and second capacitors; switching means for cyclicly coupling the capacitors in series to the power supply during a first time period and for cyclicly coupling the capacitors in parallel during a second time period so that the voltage across one of the capacitors provides a reference voltage which approaches a predetermined fraction of the supply voltage of the power supply; and a voltage regulator having an input operably connected to the capacitor providing the reference voltage, and a buffer driver to buffer the capacitors from the load to prevent loading of the capacitors by the load, said regulator being responsive to the reference voltage for providing a regulated output from the buffer driver.