Patent US4425700A successfully refreshed from Google Patents.
US4425700A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Semiconductor device and method for manufacturing the same
Assignee: Fujitsu Ltd
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Filing: 1981-08-07
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Granted: 1984-01-17
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Expires: 2001-08-07
Abstract
Abstract The method of manufacture of a semiconductor device having wirings or electrodes of silicide formed by: exposing parts of a single-crystal silicon layer formed on an insulating substrate, forming a film of metal over the exposed parts, and annealing so that a silicide is formed of the silicon and metal throughout the entire thickness of the silicon layer. The single-crystal silicon layer may be formed on a sapphire or spinel substrate having a film of silicon dioxide, sapphire or spinel, epitaxially grown on a silicon substrate.
Inventors
- 👤 Nobuo Sasaki
- 👤 Motoo Nakano
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-24 20:36
CPC Classifications
H; H10; H10P; H10P14/00; H10P14/40; H10P14/416; H10W; H10W20/00; H10W20/01; H10W20/031; H10W20/064; H10W20/066; H10W20/40; Y; Y10; Y10S; Y10S148/00; Y10S148/15
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
209 words
A method of manufacturing a semiconductor device, comprising the steps of: (a) forming a single-crystal silicon layer on an insulating substrate; (b) patterning the single-crystal silicon layer to form an active element region and a first wiring region; (c) forming a gate insulating film on the active element region and first wiring region; (d) forming a polycrystalline silicon film over the insulating substrate; (e) patterning the polycrystalline silicon film to form both a gate electrode region except over the active element region and a second wiring region; (f) implanting an impurity by blanket ion implantation into the first wiring region, the second wiring region, the gate electrode region and the active element region under the gate electrode region; (g) removing the gate insulating film on the first wiring region; (h) forming a metal layer over the insulating substrate in contact with the first wiring region, the second wiring region and the gate electrode; (i) annealing the semiconductor device to form metal silicide regions by converting the metal layer in the first wiring region, the second wiring region and the gate electrode region into metal silicide throughout the entire thickness thereof; and (j) removing the metal layer remaining after the formation of the metal silicide region in the annealing step.
Claim 2
Independent Claim
209 words
A method of manufacturing a semiconductor device, comprising the steps of: (a) forming a single-crystal silicon layer on an insulating substrate; (b) patterning the single-crystal silicon layer to form an active element region and a first wiring region; (c) forming a gate insulating film on the active element region and first wiring region; (d) forming a polycrystalline silicon film over the insulating substrate; (e) patterning the polycrystalline silicon film to form both a gate electrode region except over the active element region and a second wiring region; (f) implanting an impurity by blanket ion implantation into the first wiring region, the second wiring region, the gate electrode region and the active element region under the gate electrode region; (g) removing the gate insulating film on the first wiring region; (h) forming a metal layer over the insulating substrate in contact with the first wiring region, the second wiring region and the gate electrode; (i) annealing the semiconductor device to form metal silicide regions by converting the metal layer in the first wiring region, the second wiring region and the gate electrode region into metal silicide throughout the entire thickness thereof; and (j) removing the metal layer remaining after the formation of the metal silicide region in the annealing step.
Claim 3
Dependent Claim
18 words
A method according to claim 1, wherein said patterning step (b) is performed using a local oxidation process.
Claim 4
Dependent Claim
18 words
A method according to claim 1, wherein said patterning step (b) is performed using a photo etching process.
Claim 5
Dependent Claim
40 words
A method according to claim 1 further comprising the step of forming a polycrystalline silicon layer on said insulating film, at least a part of the polycrystalline silicon layer being converted into a metal silicide layer throughout its entire thickness.
Claim 6
Dependent Claim
27 words
A method according to claim 1, wherein the insulating substrate comprises a single-crystal silicon substrate and a film of silicon dioxide formed on the single-crystal silicon substrate.
Claim 7
Dependent Claim
28 words
A method according to claim 1, wherein the insulating substrate comprises a single-crystal silicon substrate and a film of sapphire or spinel formed on the single-crystal silicon substrate.
Claim 8
Dependent Claim
15 words
A method as claimed in claim 1, wherein the insulating substrate comprises sapphire or spinel.
Claim 9
Dependent Claim
32 words
A method as claimed in claim 1, 5, 6, or 7, wherein the metal film is selected from a group consisting of molybdenum, titanium, platinum, nickel, magnesium, iron, hafnium, rubidium and vanadium.
References Cited (Backward Citations)
US3749614A
Cited
US3753774A
Cited
US3777364A
Cited
US4080719A
Cited
US4102733A
Cited
US4276688A
Cited
US4336550A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1987-01-16 | 1987-07-18 | 1988-01-17 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1991-01-16 | 1991-07-18 | 1992-01-17 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1995-01-16 | 1995-07-18 | 1996-01-17 | $7700.00 | Window Closed / Lapsed |