Method of manufacturing a buried contact in semiconductor device

Claim 1

A method of manufacturing a semiconductor structure comprising: forming a first oxide layer over a silicon substrate, forming at least one polysilicon gate electrode on said first oxide layer, implanting dopant ions into said substrate using said gate electrode as a mask so that said dopant forms a source/drain region in said substrate with respect to said gate electrode to create a MOSFET structure, thickening said first insulating layer not covered by said gate electrode by oxidation to a thickness so as to surround said gate electrode, etching said gate electrode so as to expose said first insulating layer therebelow, etching said exposed first insulating layer to expose said substrate, introducing a second dopant into said exposed substrate to diffuse through said substrate to said source/drain region, forming a conducting lead over said thickened first insulating layer to contact said exposed substrate, whereby a buried contact to said source/drain region is formed.

Claim 2

A method of manufacturing a semiconductor structure comprising: forming a first oxide layer over a silicon substrate, forming at least one polysilicon gate electrode on said first oxide layer, implanting dopant ions into said substrate using said gate electrode as a mask so that said dopant forms a source/drain region in said substrate with respect to said gate electrode to create a MOSFET structure, thickening said first insulating layer not covered by said gate electrode by oxidation to a thickness so as to surround said gate electrode, etching said gate electrode so as to expose said first insulating layer therebelow, etching said exposed first insulating layer to expose said substrate, introducing a second dopant into said exposed substrate to diffuse through said substrate to said source/drain region, forming a conducting lead over said thickened first insulating layer to contact said exposed substrate, whereby a buried contact to said source/drain region is formed.

Claim 7

A method of manufacturing a MOSFET device comprising: growing a first oxide layer on a semiconductor substrate, depositing a first layer of polysilicon on said first oxide layer, depositing a layer of oxidation resistant layer over said polysilicon layer, masking and etching said oxidation resistant layer into two gate electrode portions, etching said polysilicon layer into two gate electrodes, said gate electrode portions of said oxidation resistant layer forming a mask to define said gate electrodes thereunder, implanting a first dopant into said substrate using said gate electrodes as mask to create two MOSFET structures having a common source/drain region therebetween, thickening said first oxide layer not covered by said gate electrodes to a thickness so as to laterally surround said gate electrodes, removing said oxidation resistant layer gate electrode portions to expose said gate electrodes, depositing a second oxide layer over said first oxide layer and said gate electrodes, etching an aperture through said second oxide layer to a preselected one of said gate electrodes, etching said preselected gate electrode to expose said first oxide layer therebelow, etching said exposed first oxide layer to expose said substrate, depositing a second layer of polysilicon over said second oxide layer to contact said exposed substrate, doping said second polysilicon layer with a second dopant being of the same polarity type as said first dopant so that said second dopant diffuses from said second polysilicon layer to said common source/drain region, defining said second polysilicon layer into a lead contacting said exposed substrate by masking and etching, whereby a buried contact is formed to said common source/drain region of said MOSFET structure having the unselected gate electrode.

Claim 8

A method of manufacturing a MOSFET device comprising: growing a first oxide layer on a semiconductor substrate, depositing a first layer of polysilicon on said first oxide layer, depositing a layer of oxidation resistant layer over said polysilicon layer, masking and etching said oxidation resistant layer into two gate electrode portions, etching said polysilicon layer into two gate electrodes, said gate electrode portions of said oxidation resistant layer forming a mask to define said gate electrodes thereunder, implanting a first dopant into said substrate using said gate electrodes as mask to create two MOSFET structures having a common source/drain region therebetween, thickening said first oxide layer not covered by said gate electrodes to a thickness so as to laterally surround said gate electrodes, removing said oxidation resistant layer gate electrode portions to expose said gate electrodes, depositing a second oxide layer over said first oxide layer and said gate electrodes, etching an aperture through said second oxide layer to a preselected one of said gate electrodes, etching said preselected gate electrode to expose said first oxide layer therebelow, etching said exposed first oxide layer to expose said substrate, depositing a second layer of polysilicon over said second oxide layer to contact said exposed substrate, doping said second polysilicon layer with a second dopant being of the same polarity type as said first dopant so that said second dopant diffuses from said second polysilicon layer to said common source/drain region, defining said second polysilicon layer into a lead contacting said exposed substrate by masking and etching, whereby a buried contact is formed to said common source/drain region of said MOSFET structure having the unselected gate electrode.

Claim 10

A method of manufacturing MOSFET devices comprising: growing a first oxide layer on a semiconductor substrate, depositing a first layer of polysilicon on said first oxide layer, depositing a layer of oxidation resistant layer over said polysilicon layer, masking and etching said oxidation resistant layer into two gate electrode portions, etching said polysilicon layer into two gate electrodes, said gate electrode portions of said oxidation resistant layer forming a mask to define said gate electrodes thereunder, implanting a first dopant into said substrate using said gate electrodes as mask to create two MOSFET structures having a common source/drain region therebetween, growing said first oxide layer not covered by said gate electrodes to a thickness so as to surround said gate electrodes, removing said oxidation resistant layer gate electrode portions to expose said gate electrodes, etching a preselected one of said gate electrodes to expose said first oxide layer therebelow, etching said exposed first oxide layer to expose said substrate, depositing a second oxide layer over said first oxide layer, said gate electrodes and said exposed substrate, said second oxide layer comprising a second dopant, being of same polarity type as said first dopant, to diffuse through said exposed substrate to said common source/drain region, etching an aperture through said second oxide layer over said preselected etched gate electrodes to expose said substrate, depositing a conducting layer over said second oxide layer to contact said exposed substrate, defining said conducting layer into a lead contacting said exposed substrate by masking and etching, whereby a buried contact is formed to said common source/drain region of said MOSFET structure having the unselected gate electrode.

Claim 11

A method of manufacturing MOSFET devices comprising: growing a first oxide layer on a semiconductor substrate, depositing a first layer of polysilicon on said first oxide layer, depositing a layer of oxidation resistant layer over said polysilicon layer, masking and etching said oxidation resistant layer into two gate electrode portions, etching said polysilicon layer into two gate electrodes, said gate electrode portions of said oxidation resistant layer forming a mask to define said gate electrodes thereunder, implanting a first dopant into said substrate using said gate electrodes as mask to create two MOSFET structures having a common source/drain region therebetween, growing said first oxide layer not covered by said gate electrodes to a thickness so as to surround said gate electrodes, removing said oxidation resistant layer gate electrode portions to expose said gate electrodes, etching a preselected one of said gate electrodes to expose said first oxide layer therebelow, etching said exposed first oxide layer to expose said substrate, depositing a second oxide layer over said first oxide layer, said gate electrodes and said exposed substrate, said second oxide layer comprising a second dopant, being of same polarity type as said first dopant, to diffuse through said exposed substrate to said common source/drain region, etching an aperture through said second oxide layer over said preselected etched gate electrodes to expose said substrate, depositing a conducting layer over said second oxide layer to contact said exposed substrate, defining said conducting layer into a lead contacting said exposed substrate by masking and etching, whereby a buried contact is formed to said common source/drain region of said MOSFET structure having the unselected gate electrode.